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opt_demorgan: add test for zero width cell

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George Rennie 2024-09-25 16:10:16 +01:00
parent 58af70624f
commit e105cae4a9
1 changed files with 15 additions and 0 deletions
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tests/opt/bug4610.ys Normal file
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read_ilang <<EOT
autoidx 1
module \top
wire output 1 \Y
cell $reduce_or $reduce_or$rtl.v:29$20
parameter \A_SIGNED 0
parameter \A_WIDTH 0
parameter \Y_WIDTH 1
connect \A { }
connect \Y \Y
end
end
EOT
equiv_opt -assert opt_demorgan