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Merge pull request #4989 from YosysHQ/krys/fix_4590
opt_expr: Fix #4590
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commit
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2 changed files with 304 additions and 0 deletions
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@ -1573,6 +1573,20 @@ skip_identity:
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}
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}
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if (mux_undef && cell->type.in(ID($_MUX4_), ID($_MUX8_), ID($_MUX16_))) {
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int num_inputs = 4;
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if (cell->type == ID($_MUX8_)) num_inputs = 8;
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if (cell->type == ID($_MUX16_)) num_inputs = 16;
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int undef_inputs = 0;
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for (auto &conn : cell->connections())
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if (!conn.first.in(ID::S, ID::T, ID::U, ID::V, ID::Y))
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undef_inputs += conn.second.is_fully_undef();
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if (undef_inputs == num_inputs) {
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replace_cell(assign_map, module, cell, "mux_undef", ID::Y, cell->getPort(ID::A));
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goto next_cell;
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}
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}
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#define FOLD_1ARG_CELL(_t) \
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if (cell->type == ID($##_t)) { \
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RTLIL::SigSpec a = cell->getPort(ID::A); \
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