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Added mem2reg option to verilog frontend
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6960df7285
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5 changed files with 31 additions and 11 deletions
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@ -164,7 +164,7 @@ namespace AST
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bool simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage);
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void expand_genblock(std::string index_var, std::string prefix, std::map<std::string, std::string> &name_map);
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void replace_ids(std::map<std::string, std::string> &rules);
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void mem2reg_as_needed_pass1(std::set<AstNode*> &mem2reg_set, std::set<AstNode*> &mem2reg_candidates, bool sync_proc, bool async_proc);
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void mem2reg_as_needed_pass1(std::set<AstNode*> &mem2reg_set, std::set<AstNode*> &mem2reg_candidates, bool sync_proc, bool async_proc, bool force_mem2reg);
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void mem2reg_as_needed_pass2(std::set<AstNode*> &mem2reg_set, AstNode *mod, AstNode *block, AstNode *top_block);
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void meminfo(int &mem_width, int &mem_size, int &addr_bits);
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@ -189,13 +189,13 @@ namespace AST
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};
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// process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code
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void process(RTLIL::Design *design, AstNode *ast, bool dump_ast = false, bool dump_ast_diff = false, bool dump_vlog = false, bool nolatches = false, bool nomem2reg = false);
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void process(RTLIL::Design *design, AstNode *ast, bool dump_ast = false, bool dump_ast_diff = false, bool dump_vlog = false, bool nolatches = false, bool nomem2reg = false, bool mem2reg = false);
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// parametric modules are supported directly by the AST library
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// therfore we need our own derivate of RTLIL::Module with overloaded virtual functions
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struct AstModule : RTLIL::Module {
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AstNode *ast;
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bool nolatches, nomem2reg;
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bool nolatches, nomem2reg, mem2reg;
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virtual ~AstModule();
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virtual RTLIL::IdString derive(RTLIL::Design *design, std::map<RTLIL::IdString, RTLIL::Const> parameters);
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virtual void update_auto_wires(std::map<RTLIL::IdString, int> auto_sizes);
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@ -217,7 +217,7 @@ namespace AST
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namespace AST_INTERNAL
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{
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// internal state variables
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extern bool flag_dump_ast, flag_dump_ast_diff, flag_nolatches, flag_nomem2reg;
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extern bool flag_dump_ast, flag_dump_ast_diff, flag_nolatches, flag_nomem2reg, flag_mem2reg;
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extern AST::AstNode *current_ast, *current_ast_mod;
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extern std::map<std::string, AST::AstNode*> current_scope;
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extern RTLIL::SigSpec *genRTLIL_subst_from, *genRTLIL_subst_to;
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