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Added mem2reg option to verilog frontend
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@ -192,6 +192,9 @@ Verilog Attributes and non-standard features
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- The "nomem2reg" attribute on modules or arrays prohibits the
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automatic early conversion of arrays to separate registers.
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- The "mem2reg" attribute on modules or arrays forces the early
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conversion of arrays to separate registers.
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- The "nolatches" attribute on modules or always-blocks
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prohibits the generation of logic-loops for latches. Instead
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all not explicitly assigned values default to x-bits.
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