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Improved ice40_ffinit error reporting

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This commit is contained in:
Clifford Wolf 2016-06-30 09:58:13 +02:00
parent 7cddab0788
commit df5ebfa0a0
1 changed files with 5 additions and 1 deletions
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6
techlibs/ice40/ice40_ffinit.cc
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@ -57,6 +57,7 @@ struct Ice40FfinitPass : public Pass {
SigMap sigmap(module); SigMap sigmap(module);
pool<Wire*> init_wires; pool<Wire*> init_wires;
dict<SigBit, State> initbits; dict<SigBit, State> initbits;
dict<SigBit, SigBit> initbit_to_wire;
pool<SigBit> handled_initbits; pool<SigBit> handled_initbits;
for (auto wire : module->selected_wires()) for (auto wire : module->selected_wires())
@ -78,11 +79,14 @@ struct Ice40FfinitPass : public Pass {
if (initbits.count(bit)) { if (initbits.count(bit)) {
if (initbits.at(bit) != val) if (initbits.at(bit) != val)
log_error("Conflicting init values for signal %s.\n", log_signal(bit)); log_error("Conflicting init values for signal %s (%s = %s, %s = %s).\n",
log_signal(bit), log_signal(SigBit(wire, i)), log_signal(val),
log_signal(initbit_to_wire[bit]), log_signal(initbits.at(bit)));
continue; continue;
} }
initbits[bit] = val; initbits[bit] = val;
initbit_to_wire[bit] = SigBit(wire, i);
} }
} }