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Merge pull request #4892 from YosysHQ/emil/fix-memory-libmap-dangling-cells

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memory_libmap: update indices on design modification
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Emil J 2025-02-12 10:21:01 +01:00 • committed by GitHub
commit df3c62a4ed
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passes/memory/memory_libmap.cc
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@ -2258,6 +2258,8 @@ struct MemoryLibMapPass : public Pass {
log("using FF mapping for memory %s.%s\n", log_id(module->name), log_id(mem.memid)); log("using FF mapping for memory %s.%s\n", log_id(module->name), log_id(mem.memid));
} else { } else {
map.emit(map.cfgs[idx]); map.emit(map.cfgs[idx]);
// Rebuild indices after modifying module
worker = MapWorker(module);
} }
} }
} }