3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-10 16:13:26 +00:00

sta: proof of concept to compute arrival times

This commit is contained in:
Eddie Hung 2020-02-18 12:23:17 -08:00
parent c6b22f5b7d
commit dedaab3a7d
4 changed files with 235 additions and 0 deletions

View file

@ -339,6 +339,27 @@ pool<string> RTLIL::AttrObject::get_strpool_attribute(RTLIL::IdString id) const
return data;
}
void RTLIL::AttrObject::set_intvec_attribute(RTLIL::IdString id, const vector<int> &data)
{
std::stringstream attrval;
for (auto &i : data) {
if (attrval.tellp() > 0)
attrval << " ";
attrval << i;
}
attributes[id] = RTLIL::Const(attrval.str());
}
vector<int> RTLIL::AttrObject::get_intvec_attribute(RTLIL::IdString id) const
{
vector<int> data;
auto it = attributes.find(id);
if (it != attributes.end())
for (const auto &s : split_tokens(attributes.at(id).decode_string()))
data.push_back(atoi(s.c_str()));
return data;
}
bool RTLIL::Selection::selected_module(RTLIL::IdString mod_name) const
{
if (full_selection)