mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-10-30 19:22:31 +00:00 
			
		
		
		
	install *_nowide.lut files
This commit is contained in:
		
							parent
							
								
									c5563b67c8
								
							
						
					
					
						commit
						dd8d264bf5
					
				
					 2 changed files with 3 additions and 0 deletions
				
			
		|  | @ -13,6 +13,7 @@ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/latches_map.v)) | ||||||
| 
 | 
 | ||||||
| $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.box)) | $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.box)) | ||||||
| $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.lut)) | $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.lut)) | ||||||
|  | $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g_nowide.lut)) | ||||||
| 
 | 
 | ||||||
| EXTRA_OBJS += techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk | EXTRA_OBJS += techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk | ||||||
| .SECONDARY: techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk | .SECONDARY: techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk | ||||||
|  |  | ||||||
|  | @ -30,8 +30,10 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_map.v)) | ||||||
| $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v)) | $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v)) | ||||||
| $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v)) | $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v)) | ||||||
| $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v)) | $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v)) | ||||||
|  | 
 | ||||||
| $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box)) | $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box)) | ||||||
| $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut)) | $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut)) | ||||||
|  | $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7_nowide.lut)) | ||||||
| 
 | 
 | ||||||
| $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh)) | $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh)) | ||||||
| $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh)) | $(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh)) | ||||||
|  |  | ||||||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue