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Merge pull request #1584 from YosysHQ/mwk/xilinx-flaky-test

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tests/xilinx: fix flaky mux test
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Eddie Hung 2019-12-18 12:53:45 -05:00 committed by GitHub
parent a235250403 f382164d6e
commit dd71ac5cc9
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1 changed files with 4 additions and 2 deletions
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tests/arch/xilinx/mux.ys
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@ -40,6 +40,8 @@ proc
equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux16 # Constrain all select calls below inside the top module
select -assert-count 5 t:LUT6
select -assert-min 5 t:LUT6
select -assert-max 7 t:LUT6
select -assert-max 2 t:MUXF7
select -assert-none t:LUT6 %% t:* %D
select -assert-none t:LUT6 t:MUXF7 %% t:* %D