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Added cell->known(), cell->input(portname), cell->output(portname)

This commit is contained in:
Clifford Wolf 2015-02-07 11:40:19 +01:00
parent d5e30978e9
commit dce1fae777
2 changed files with 39 additions and 0 deletions

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@ -1140,6 +1140,11 @@ public:
const RTLIL::SigSpec &getPort(RTLIL::IdString portname) const;
const dict<RTLIL::IdString, RTLIL::SigSpec> &connections() const;
// information about cell ports
bool known() const;
bool input(RTLIL::IdString portname) const;
bool output(RTLIL::IdString portname) const;
// access cell parameters
bool hasParam(RTLIL::IdString paramname) const;
void unsetParam(RTLIL::IdString paramname);