Fix a regression from #3035.

kernel/ffmerge.cc

@@ -157,7 +157,7 @@ bool FfMergeHelper::find_output_ff(RTLIL::SigSpec sig, FfData &ff, pool<std::pai
 }
 
 bool FfMergeHelper::find_input_ff(RTLIL::SigSpec sig, FfData &ff, pool<std::pair<Cell *, int>> &bits) {
-	ff = FfData();
+	ff = FfData(module, initvals, NEW_ID);
 	sigmap->apply(sig);
 
 	bool found = false;

tests/memories/trans_addr_enable.v

@@ -0,0 +1,21 @@
+// expect-wr-ports 1
+// expect-rd-ports 1
+// expect-rd-clk \clk
+
+module top(input clk, we, rae, input [7:0] addr, wd, output [7:0] rd);
+
+reg [7:0] mem[0:255];
+
+reg [7:0] rra;
+
+always @(posedge clk) begin
+	if (we)
+		mem[addr] <= wd;
+
+	if (rae)
+		rra <= addr;
+end
+
+assign rd = mem[rra];
+
+endmodule