mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-19 04:13:39 +00:00
Code Activity

techmap: Add _TECHMAP_CELLNAME_ special parameter.

Browse source 
This parameter will resolve to the name of the cell being mapped.  The
first user of this parameter will be synth_intel_alm's Quartus output,
which requires a unique (and preferably descriptive) name passed as
a cell parameter for the memory cells.
This commit is contained in:
Marcelina Kościelnicka 2020-07-21 15:00:54 +02:00
parent 57af8499df
commit dc07ae9677
4 changed files with 50 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

6
passes/techmap/techmap.cc
View file

@ -643,6 +643,8 @@ struct TechmapWorker
if (tpl->avail_parameters.count(ID::_TECHMAP_CELLTYPE_) != 0)
parameters.emplace(ID::_TECHMAP_CELLTYPE_, RTLIL::unescape_id(cell->type));
if (tpl->avail_parameters.count(ID::_TECHMAP_CELLNAME_) != 0)
parameters.emplace(ID::_TECHMAP_CELLNAME_, RTLIL::unescape_id(cell->name));
for (auto &conn : cell->connections()) {
if (tpl->avail_parameters.count(stringf("\\_TECHMAP_CONSTMSK_%s_", log_id(conn.first))) != 0) {
@ -1111,6 +1113,10 @@ struct TechmapPass : public Pass {
log(" When a parameter with this name exists, it will be set to the type name\n");
log(" of the cell that matches the module.\n");
log("\n");
log(" _TECHMAP_CELLNAME_\n");
log(" When a parameter with this name exists, it will be set to the name\n");
log(" of the cell that matches the module.\n");
log("\n");
log(" _TECHMAP_CONSTMSK_<port-name>_\n");
log(" _TECHMAP_CONSTVAL_<port-name>_\n");
log(" When this pair of parameters is available in a module for a port, then\n");