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	Release version 0.54
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					 3 changed files with 17 additions and 4 deletions
				
			
		
							
								
								
									
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								CHANGELOG
									
										
									
									
									
								
							
							
						
						
									
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								CHANGELOG
									
										
									
									
									
								
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					@ -2,8 +2,21 @@
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List of major changes and improvements between releases
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					List of major changes and improvements between releases
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=======================================================
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					=======================================================
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Yosys 0.53 .. Yosys 0.54-dev
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					Yosys 0.53 .. Yosys 0.54
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--------------------------
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					--------------------------
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					 * New commands and options
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					    - Added "-genlib" option to "abc_new" and "abc9_exe" passes.
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					    - Added "-verbose" and "-quiet" options to "libcache" pass.
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					    - Added "-no-sort" option to "write_aiger" pass.
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					 * Various
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					    - Added "muldiv_c" peepopt.
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					    - Accept (and ignore) SystemVerilog unique/priority if.
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					    - "read_verilog" copy inout ports in and out of functions/tasks.
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					    - Enable single-bit vector wires in RTLIL.
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					 * Xilinx support
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					    - Single-port URAM mapping to support memories 2048 x 144b 
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Yosys 0.52 .. Yosys 0.53
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					Yosys 0.52 .. Yosys 0.53
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--------------------------
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					--------------------------
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										4
									
								
								Makefile
									
										
									
									
									
								
							
							
						
						
									
										4
									
								
								Makefile
									
										
									
									
									
								
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					@ -160,7 +160,7 @@ ifeq ($(OS), Haiku)
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CXXFLAGS += -D_DEFAULT_SOURCE
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					CXXFLAGS += -D_DEFAULT_SOURCE
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endif
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					endif
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YOSYS_VER := 0.53+101
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					YOSYS_VER := 0.54
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YOSYS_MAJOR := $(shell echo $(YOSYS_VER) | cut -d'.' -f1)
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					YOSYS_MAJOR := $(shell echo $(YOSYS_VER) | cut -d'.' -f1)
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YOSYS_MINOR := $(shell echo $(YOSYS_VER) | cut -d'.' -f2 | cut -d'+' -f1)
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					YOSYS_MINOR := $(shell echo $(YOSYS_VER) | cut -d'.' -f2 | cut -d'+' -f1)
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YOSYS_COMMIT := $(shell echo $(YOSYS_VER) | cut -d'+' -f2)
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					YOSYS_COMMIT := $(shell echo $(YOSYS_VER) | cut -d'+' -f2)
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					@ -183,7 +183,7 @@ endif
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OBJS = kernel/version_$(GIT_REV).o
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					OBJS = kernel/version_$(GIT_REV).o
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bumpversion:
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					bumpversion:
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	sed -i "/^YOSYS_VER := / s/+[0-9][0-9]*$$/+`git log --oneline 53c22ab.. | wc -l`/;" Makefile
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					#	sed -i "/^YOSYS_VER := / s/+[0-9][0-9]*$$/+`git log --oneline 53c22ab.. | wc -l`/;" Makefile
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ABCMKARGS = CC="$(CXX)" CXX="$(CXX)" ABC_USE_LIBSTDCXX=1 ABC_USE_NAMESPACE=abc VERBOSE=$(Q)
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					ABCMKARGS = CC="$(CXX)" CXX="$(CXX)" ABC_USE_LIBSTDCXX=1 ABC_USE_NAMESPACE=abc VERBOSE=$(Q)
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					@ -6,7 +6,7 @@ import os
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project = 'YosysHQ Yosys'
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					project = 'YosysHQ Yosys'
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author = 'YosysHQ GmbH'
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					author = 'YosysHQ GmbH'
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copyright ='2025 YosysHQ GmbH'
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					copyright ='2025 YosysHQ GmbH'
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yosys_ver = "0.53"
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					yosys_ver = "0.54"
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# select HTML theme
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					# select HTML theme
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html_theme = 'furo-ys'
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					html_theme = 'furo-ys'
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