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Add SF2 IO buffer insertion

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Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2019-01-17 14:38:37 +01:00
parent 9b277fc21e
commit db5765b443
6 changed files with 171 additions and 3 deletions
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3
examples/igloo2/example.v
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@ -1,5 +1,6 @@
module example (
input clk,
input EN,
output LED1,
output LED2,
output LED3,
@ -14,7 +15,7 @@ module example (
reg [BITS-1:0] outcnt;
always @(posedge clk) begin
counter <= counter + 1;
counter <= counter + EN;
outcnt <= counter >> LOG2DELAY;
end

2
examples/igloo2/libero.tcl
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@ -5,7 +5,7 @@ file delete -force proj
new_project \
-name example \
-location proj \
-block_mode 1 \
-block_mode 0 \
-hdl "VERILOG" \
-family IGLOO2 \
-die PA4MGL500 \