mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-11 13:40:53 +00:00
Code Activity

Docs: Tidying

Browse source 
Fix error on duplicated heading.
Drop `cmd_ref`_ link (everything already uses :doc:`cmd_ref`).
This commit is contained in:
Krystine Sherwin 2025-08-05 09:53:57 +12:00
parent 3784f6b17f
commit db3dc45bc6
No known key found for this signature in database
2 changed files with 2 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

2
docs/source/cmd_ref.rst
View file

@ -1,5 +1,3 @@
.. _cmd_ref:
================================================================================
Command line reference
================================================================================

4
docs/source/using_yosys/more_scripting/interactive_investigation.rst
View file

@ -311,8 +311,8 @@ cells, as the net-names are usually suppressed in the circuit diagram if they
are auto-generated. Note that the output is in the RTLIL representation,
described in :doc:`/yosys_internals/formats/rtlil_rep`.
Interactive Design Investigation
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Design Investigation
~~~~~~~~~~~~~~~~~~~~
Yosys can also be used to investigate designs (or netlists created from other
tools).