From 750d536bbab93acd090bfce8453ae4d739a7e90d Mon Sep 17 00:00:00 2001 From: Tianji Liu Date: Wed, 4 Mar 2026 11:24:24 +0800 Subject: [PATCH 1/3] abc: new option to pass ABC read_lib args --- passes/techmap/abc.cc | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc index 6e5b1fba8..3bc97b770 100644 --- a/passes/techmap/abc.cc +++ b/passes/techmap/abc.cc @@ -125,6 +125,7 @@ struct AbcConfig std::vector liberty_files; std::vector genlib_files; std::string constr_file; + std::string abc_liberty_args; vector lut_costs; std::string delay_target; std::string sop_inputs; @@ -1024,7 +1025,7 @@ void AbcModuleState::prepare_module(RTLIL::Design *design, RTLIL::Module *module } bool first_lib = true; for (std::string liberty_file : config.liberty_files) { - abc_script += stringf("read_lib %s %s -w \"%s\" ; ", dont_use_args, first_lib ? "" : "-m", liberty_file); + abc_script += stringf("read_lib %s %s %s -w \"%s\" ; ", dont_use_args, first_lib ? "" : "-m", config.abc_liberty_args, liberty_file); first_lib = false; } for (std::string liberty_file : config.genlib_files) @@ -2026,6 +2027,10 @@ struct AbcPass : public Pass { log(" preserve naming by an equivalence check between the original and\n"); log(" post-ABC netlists (experimental).\n"); log("\n"); + log(" -liberty_args \n"); + log(" when -liberty is used, also pass the specified arguments to ABC\n"); + log(" command \"read_lib\". Example: -liberty_args \"-G 250\"\n"); + log("\n"); log("When no target cell library is specified the Yosys standard cell library is\n"); log("loaded into ABC before the ABC script is executed.\n"); log("\n"); @@ -2217,6 +2222,14 @@ struct AbcPass : public Pass { config.markgroups = true; continue; } + if (arg == "-liberty_args" && argidx+1 < args.size()) { + config.abc_liberty_args = args[++argidx]; + if (!config.abc_liberty_args.empty()) { + if (config.abc_liberty_args[0] == '\"' && config.abc_liberty_args.back() == '\"') + config.abc_liberty_args = config.abc_liberty_args.substr(1, config.abc_liberty_args.size() - 2); + } + continue; + } break; } extra_args(args, argidx, design); From cb6209506ed83e992d0d9104e5d06a1948ab0db2 Mon Sep 17 00:00:00 2001 From: Tianji Liu Date: Thu, 7 May 2026 18:45:35 +0800 Subject: [PATCH 2/3] abc: disable scl merge if extra read_lib args provided --- passes/techmap/abc.cc | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc index 95c70c73a..dd0364fe5 100644 --- a/passes/techmap/abc.cc +++ b/passes/techmap/abc.cc @@ -1031,11 +1031,14 @@ void AbcModuleState::prepare_module(RTLIL::Design *design, RTLIL::Module *module run_abc.dont_use_args += stringf("-X \"%s\" ", dont_use_cell); } - std::string merged_scl = convert_liberty_files_to_merged_scl(config.liberty_files, run_abc.dont_use_args, config.exe_file); + std::string merged_scl; + if (config.abc_liberty_args.empty()) { + merged_scl = convert_liberty_files_to_merged_scl(config.liberty_files, run_abc.dont_use_args, config.exe_file); + } if (!merged_scl.empty()) { run_abc.abc_script += stringf("read_scl \"%s\" ; ", merged_scl.c_str()); } else if(!config.liberty_files.empty()) { - log_warning("ABC: Merged scl conversion failed, using liberty format\n"); + log_warning("ABC: Merged scl conversion failed, or abc_liberty_args provided, using liberty format\n"); bool first_lib = true; for (std::string liberty_file : config.liberty_files) { run_abc.abc_script += stringf("read_lib %s %s %s -w \"%s\" ; ", run_abc.dont_use_args, first_lib ? "" : "-m", config.abc_liberty_args, liberty_file); From 3f354eb03be6cc46fd6d97a85df2c531a2e41ab9 Mon Sep 17 00:00:00 2001 From: Tianji Liu Date: Fri, 8 May 2026 07:17:29 +0800 Subject: [PATCH 3/3] abc: update log for extra read_lib args --- passes/techmap/abc.cc | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc index dd0364fe5..1ed0c867d 100644 --- a/passes/techmap/abc.cc +++ b/passes/techmap/abc.cc @@ -1038,7 +1038,11 @@ void AbcModuleState::prepare_module(RTLIL::Design *design, RTLIL::Module *module if (!merged_scl.empty()) { run_abc.abc_script += stringf("read_scl \"%s\" ; ", merged_scl.c_str()); } else if(!config.liberty_files.empty()) { - log_warning("ABC: Merged scl conversion failed, or abc_liberty_args provided, using liberty format\n"); + if (!config.abc_liberty_args.empty()) { + log("ABC: abc_liberty_args provided, using liberty format\n"); + } else { + log_warning("ABC: Merged scl conversion failed, using liberty format\n"); + } bool first_lib = true; for (std::string liberty_file : config.liberty_files) { run_abc.abc_script += stringf("read_lib %s %s %s -w \"%s\" ; ", run_abc.dont_use_args, first_lib ? "" : "-m", config.abc_liberty_args, liberty_file);