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documenting.rst: Cell help v1 and v2
Also a (commented) mention of v2a for the extra curious.
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@ -320,89 +320,104 @@ content used in :file:`kernel/register.cc`.
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Calling `help -cells` will list all built-in cell types with their input/output
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Calling `help -cells` will list all built-in cell types with their input/output
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ports. There is again an unlisted :ref:`cell index <cellindex>` which shows all
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ports. There is again an unlisted :ref:`cell index <cellindex>` which shows all
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cell types with their title. Unlike commands, providing a title is optional, so
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cell types with their title. Unlike commands, providing a title is optional,
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most just use the name of the cell (qualified with the containing group). It is
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and only available with `v2`_ formatting, so most just use the name of the cell
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also possible to display the verilog simulation model by calling `help
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(qualified with the containing group). It is also possible to display the
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<celltype>+`.
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verilog simulation model by calling `help <celltype>+`.
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.. _v1:
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.. _v1:
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v1 (default)
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v1 (default)
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~~~~~~~~~~~~
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~~~~~~~~~~~~
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- Legacy format
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As mentioned previously, the verilog simulation models are preceded by a
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- Expects formatting as follows:
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structured comment block. Each line starting with ``//-`` is added to the
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description of the next verilog module. Non-empty lines must have a space after
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the dash before text, and should be limited to 80 characters (84 including the
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``//-``). The description is rendered to the terminal as-is when calling `help
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<celltype>`, while the web docs will render it as text, with empty lines being
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used to separate paragraphs.
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.. code-block:: verilog
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..
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Descriptions can extend into the verilog module itself, including *all* comment
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lines that start with a dash prior to the ``endmodule``. However, everything in
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the ``module .. endmodule`` block is considered source code, so this is not
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recommended.
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//-
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.. note::
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//- $<celltype> (<ports>)
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//* group <cellgroup>
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//-
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//- <cell description>
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//-
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module \$<celltype> (<ports>);
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// ...
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endmodule
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- ``//* group`` line is generally after the cell signature, but can appear
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Most of the legacy cell descriptions include a signature line (``//-
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anywhere in the comment block
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$<celltype> (<ports>)``). More recent versions of the help generation will
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automatically produce this signature from the verilog declaration, making
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this an optional inclusion. Note that if a signature line *is* included, it
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*must* start with at least 4 spaces (not tabs), and include one empty line
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(``//-``) before and after.
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- determines where the cell is included in sphinx
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Each cell type must also be assigned a group, failing to do so will produce an
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- check :file:`docs/source/cell` for current groups
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error. This can be done by adding ``//* group <cellgroup>`` anywhere in the
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- a missing group will raise an error
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comment block. As with commands, the group determines where the cell appears in
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- assigning an unused group will result in the cell not being included in the
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the Sphinx documentation, but does not otherwise impact the output of `help`. As
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sphinx docs
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with commands, there is no warning produced if cells are assigned a group which
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is not used in the documentation. Make sure to check :file:`docs/source/cell`
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for the groups currently available.
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- the port signature line (``//- $<celltype> (<ports>)``) must start with (at
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For the cell models in :file:`techlibs/common/simcells.v`, it is possible to
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least) 4 spaces (not tabs)
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provide a truth table at the end of the cell description which is rendered in
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sphinx docs as a literal code block. We can look at the :ref:`NOT_module` to
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- the empty lines (``//-``) before/after the signature are required
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see this in action.
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- cell description can be multiple lines, but each line must start with ``//-``
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and a space
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- description should have a trailing empty line
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- lines should be limited to 80 characters (84 including ``//-``), and are
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rendered to the terminal as-is
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- web docs will render as text, with empty lines used to separate paragraphs
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- cells in :file:`techlibs/common/simcells.v` can have optional truth table at
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the end of the cell description which is rendered in sphinx docs as a literal
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code block
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- e.g. `$_NOT_`:
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.. literalinclude:: /generated/simcells._NOT_.v
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.. literalinclude:: /generated/simcells._NOT_.v
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:language: verilog
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:language: verilog
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:start-at: //-
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:start-at: //-
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:end-at: module \$_NOT_
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:end-at: module \$_NOT_
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:name: NOT_module
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:caption: `$_NOT_` cell comment block from :file:`techlibs/common/simcells.v`
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..
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v1 descriptions in :file:`techlibs/common/simcells.v` have their version
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unconditionally changed to ``2a`` to facilitate the truth table rendering,
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making use of the v2 handling of codeblocks with ``::``. This also means A.
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using ``::`` on its own in a v1 (gate-level) description should be avoided, and
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B. *all* text after the ``"Truth table:"`` line is included in the codeblock.
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.. _v2:
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.. _v2:
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v2 (more expressive)
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v2 (more expressive)
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~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~
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- each field of the ``SimHelper`` struct can be assigned with:
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Fields can be directly assigned with a ``//* <name> <value>`` comment line. We
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saw this in the `v1`_ format with the group, but this is actually possible with
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*all* fields of the ``SimHelper`` struct. In order to use the extra fields,
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``ver`` must be explicitly set as ``2``. The extra fields available are as
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follows, with an example provided by the :ref:`nex_module`.
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.. code-block:: verilog
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- title
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A short title for the cell, equivalent to ``short_help`` in commands.
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Rendered before the description and when hovering over links in
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documentation.
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//* <name> <value>
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- tags
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A space-separated list of :doc:`/cell/properties`. Not used in `help`
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- ``ver`` must be explicitly set as ``2``
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output, but provided when dumping to JSON and in the Sphinx docs.
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- optional fields ``title`` and ``tags``
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- title used for better displaying of cell
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- tags is a space-separated list of :doc:`/cell/properties`
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- the port signature is automatically generated from the ``module`` definition
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- cell description is the same as v1
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- can link to commands or passes using backticks (`````)
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- e.g. `$nex`:
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.. literalinclude:: /generated/simlib.nex.v
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.. literalinclude:: /generated/simlib.nex.v
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:language: verilog
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:language: verilog
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:name: nex_module
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:caption: `$nex` cell comment block from :file:`techlibs/common/simlib.v`
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- code blocks can be included as following:
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.. warning::
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While it is possible to assign values to any of the ``SimHelper`` fields,
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some fields are automatically assigned and explicitly setting them may result
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in errors, or discarding of the assigned value. These fields are the name,
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ports, code, source, and desc.
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The cell description is provided in the same way as in `v1`_, with each line
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starting with a ``//-``. When generating the Sphinx documentation, the cell
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description is interpreted as raw RST. This allows both in-line formatting like
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linking to commands or passes using backticks (`````), and literal code blocks
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with the ``::`` marker as in the following example:
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.. code-block:: verilog
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.. code-block:: verilog
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@ -415,10 +430,10 @@ v2 (more expressive)
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//-
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//-
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//- more text
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//- more text
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- the empty line after the ``::`` and before the text continues are required
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Note that the empty line after the ``::`` and before the text continues are
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- the ``::`` line will be ignored in the `help` call while sphinx docs will
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required, as is the indentation before the literal contents. When rendering to
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treat everything that follows as a literal block until the next unindented
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the terminal with `help <celltype>`, the ``::`` line will be ignored, while
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line:
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Sphinx displays the section verbatim like so:
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text
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text
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::
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::
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@ -429,6 +444,11 @@ v2 (more expressive)
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more text
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more text
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.. todo:: in line formatting for web docs isn't exclusive to v2,
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but it does raise the question of if we should be doing something to prevent
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v1 descriptions being treated as raw RST.
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Dumping to JSON
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Dumping to JSON
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---------------
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---------------
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