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Merge pull request #1297 from YosysHQ/eddie/fix_1284_again

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extract_fa: Un-inverting AND with an inverted input also inverts input to X{,N}OR
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Eddie Hung 2019-08-15 07:49:02 -07:00 • committed by GitHub
commit d8a2aaa463
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1 changed files with 2 additions and 2 deletions
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4
passes/techmap/extract_fa.cc
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@ -513,13 +513,13 @@ struct ExtractFaWorker
} }
if (func2.at(key).count(xor2_func)) { if (func2.at(key).count(xor2_func)) {
SigBit YY = invert_xy ? module->NotGate(NEW_ID, Y) : Y; SigBit YY = invert_xy || (f2i.inv_a && !f2i.inv_b) || (!f2i.inv_a && f2i.inv_b) ? module->NotGate(NEW_ID, Y) : Y;
for (auto bit : func2.at(key).at(xor2_func)) for (auto bit : func2.at(key).at(xor2_func))
assign_new_driver(bit, YY); assign_new_driver(bit, YY);
} }
if (func2.at(key).count(xnor2_func)) { if (func2.at(key).count(xnor2_func)) {
SigBit YY = invert_xy ? Y : module->NotGate(NEW_ID, Y); SigBit YY = invert_xy || (f2i.inv_a && !f2i.inv_b) || (!f2i.inv_a && f2i.inv_b) ? Y : module->NotGate(NEW_ID, Y);
for (auto bit : func2.at(key).at(xnor2_func)) for (auto bit : func2.at(key).at(xnor2_func))
assign_new_driver(bit, YY); assign_new_driver(bit, YY);
} }