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Backends: More consistent usage of selections

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Drop use_selection flag from Json and Jny Writers, instead they always operate on selections and if the write_* pass is called without -selected then it pushes the complete selection.
rtlil_backend prints differently if it is dumping a portion or whole design, so push the complete selection inside of the dump if needed.
Also update `Design::selected_modules()` error message for partially selected modules to match the existing error messages that it replaces.
This commit is contained in:
Krystine Sherwin 2024-11-22 07:02:16 +13:00
parent 24e54d942a
commit d84c3a9eac
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7 changed files with 78 additions and 101 deletions
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17
backends/cxxrtl/cxxrtl_backend.cc
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@ -2774,9 +2774,7 @@ struct CxxrtlWorker {
RTLIL::Module *top_module = nullptr;
std::vector<RTLIL::Module*> modules;
TopoSort<RTLIL::Module*> topo_design;
for (auto module : design->modules()) {
if (!design->selected_module(module))
continue;
for (auto module : design->all_selected_modules()) {
if (module->get_bool_attribute(ID(cxxrtl_blackbox)))
modules.push_back(module); // cxxrtl blackboxes first
if (module->get_blackbox_attribute() || module->get_bool_attribute(ID(cxxrtl_blackbox)))
@ -2910,10 +2908,7 @@ struct CxxrtlWorker {
bool has_feedback_arcs = false;
bool has_buffered_comb_wires = false;
for (auto module : design->modules()) {
if (!design->selected_module(module))
continue;
for (auto module : design->all_selected_modules()) {
SigMap &sigmap = sigmaps[module];
sigmap.set(module);
@ -3410,16 +3405,10 @@ struct CxxrtlWorker {
{
has_sync_init = false;
for (auto module : design->modules()) {
for (auto module : design->selected_modules(RTLIL::SELECT_WHOLE_CMDERR, RTLIL::SB_ALL)) {
if (module->get_blackbox_attribute() && !module->has_attribute(ID(cxxrtl_blackbox)))
continue;
if (!design->selected_whole_module(module))
if (design->selected_module(module))
log_cmd_error("Can't handle partially selected module `%s'!\n", id2cstr(module->name));
if (!design->selected_module(module))
continue;
for (auto proc : module->processes)
for (auto sync : proc.second->syncs)
if (sync->type == RTLIL::STi)