From d840a852a9b9d41d0824c7d24909804ea59925b9 Mon Sep 17 00:00:00 2001 From: Janeczko Jakub Date: Mon, 3 Aug 2026 19:27:58 +0200 Subject: [PATCH] Fix typo in comment about address collision pattern --- backends/verilog/verilog_backend.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc index d12f70e31..f23742913 100644 --- a/backends/verilog/verilog_backend.cc +++ b/backends/verilog/verilog_backend.cc @@ -602,8 +602,8 @@ void dump_memory(std::ostream &f, std::string indent, Mem &mem) } } - // Due to some synthesis tools being incompetent in detecting address colission pattern - // from verilog with strictly defined semantics and not infering bram (see github issue #5082), + // Due to some synthesis tools being incompetent in detecting address collision pattern + // from verilog with strictly defined semantics and not inferring bram (see github issue #5082), // memory cannot use: // 1. e.g Vivado assumes non-transparent port // assign r_data = mem[latched r_addr];