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[core] add rf techlibs

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tangxifan 2026-05-14 17:33:24 -07:00
parent 54f8505045
commit d7cf53d86a
49 changed files with 34443 additions and 0 deletions
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7
techlibs/rapidflex/alkaidL/cell_sim.v Normal file
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@ -0,0 +1,7 @@
//-------------------------------------------------
// Include all the primitives
//-------------------------------------------------
`include "cell_sim_arith.v"
`include "cell_sim_dsp.v"
`include "cell_sim_bram.v"
`include "cell_sim_ff.v"