3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-06 11:20:27 +00:00

After reading the SV spec, using non-standard predict() instead of expect()

This commit is contained in:
Clifford Wolf 2016-07-21 13:34:33 +02:00
parent 721f1f5ecf
commit d7763634b6
16 changed files with 28 additions and 32 deletions

View file

@ -421,7 +421,7 @@ pass. The combinatorial logic cells can be mapped to physical cells from a Liber
using the {\tt abc} pass.
\begin{fixme}
Add information about {\tt \$assert}, {\tt \$assume}, {\tt \$expect}, and {\tt \$equiv} cells.
Add information about {\tt \$assert}, {\tt \$assume}, {\tt \$predict}, and {\tt \$equiv} cells.
\end{fixme}
\begin{fixme}