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After reading the SV spec, using non-standard predict() instead of expect()
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parent
721f1f5ecf
commit
d7763634b6
16 changed files with 28 additions and 32 deletions
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@ -116,7 +116,7 @@ struct CellTypes
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setup_type("$assert", {A, EN}, pool<RTLIL::IdString>(), true);
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setup_type("$assume", {A, EN}, pool<RTLIL::IdString>(), true);
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setup_type("$expect", {A, EN}, pool<RTLIL::IdString>(), true);
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setup_type("$predict", {A, EN}, pool<RTLIL::IdString>(), true);
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setup_type("$equiv", {A, B}, {Y}, true);
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}
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@ -1017,7 +1017,7 @@ namespace {
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return;
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}
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if (cell->type.in("$assert", "$assume", "$expect")) {
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if (cell->type.in("$assert", "$assume", "$predict")) {
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port("\\A", 1);
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port("\\EN", 1);
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check_expected();
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@ -1798,7 +1798,7 @@ RTLIL::Cell* RTLIL::Module::addAssume(RTLIL::IdString name, RTLIL::SigSpec sig_a
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RTLIL::Cell* RTLIL::Module::addExpect(RTLIL::IdString name, RTLIL::SigSpec sig_a, RTLIL::SigSpec sig_en)
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{
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RTLIL::Cell *cell = addCell(name, "$expect");
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RTLIL::Cell *cell = addCell(name, "$predict");
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cell->setPort("\\A", sig_a);
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cell->setPort("\\EN", sig_en);
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return cell;
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@ -1347,7 +1347,7 @@ struct SatGen
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return true;
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}
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if (cell->type == "$expect")
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if (cell->type == "$predict")
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{
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std::string pf = prefix + (timestep == -1 ? "" : stringf("@%d:", timestep));
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expects_a[pf].append((*sigmap)(cell->getPort("\\A")));
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