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After reading the SV spec, using non-standard predict() instead of expect()

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This commit is contained in:
Clifford Wolf 2016-07-21 13:34:33 +02:00
parent 721f1f5ecf
commit d7763634b6
16 changed files with 28 additions and 32 deletions
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10
frontends/verilog/verilog_parser.y
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@ -113,7 +113,7 @@ static void free_attr(std::map<std::string, AstNode*> *al)
%token TOK_SYNOPSYS_FULL_CASE TOK_SYNOPSYS_PARALLEL_CASE
%token TOK_SUPPLY0 TOK_SUPPLY1 TOK_TO_SIGNED TOK_TO_UNSIGNED
%token TOK_POS_INDEXED TOK_NEG_INDEXED TOK_ASSERT TOK_ASSUME
%token TOK_EXPECT TOK_PROPERTY
%token TOK_PREDICT TOK_PROPERTY
%type <ast> range range_or_multirange non_opt_range non_opt_multirange range_or_signed_int
%type <ast> wire_type expr basic_expr concat_list rvalue lvalue lvalue_concat_list
@ -967,8 +967,8 @@ assert:
TOK_ASSUME '(' expr ')' ';' {
ast_stack.back()->children.push_back(new AstNode(AST_ASSUME, $3));
} |
TOK_EXPECT '(' expr ')' ';' {
ast_stack.back()->children.push_back(new AstNode(AST_EXPECT, $3));
TOK_PREDICT '(' expr ')' ';' {
ast_stack.back()->children.push_back(new AstNode(AST_PREDICT, $3));
};
assert_property:
@ -978,8 +978,8 @@ assert_property:
TOK_ASSUME TOK_PROPERTY '(' expr ')' ';' {
ast_stack.back()->children.push_back(new AstNode(AST_ASSUME, $4));
} |
TOK_EXPECT TOK_PROPERTY '(' expr ')' ';' {
ast_stack.back()->children.push_back(new AstNode(AST_EXPECT, $4));
TOK_PREDICT TOK_PROPERTY '(' expr ')' ';' {
ast_stack.back()->children.push_back(new AstNode(AST_PREDICT, $4));
};
simple_behavioral_stmt: