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tests/symfpu: Add cover checks
Include mask/map for abc inputs (and switch to `anyconst` instead of `anyseq`). Add false divide check for mantissa. Covers aren't currently being tested by anything (and have to be removed for `sat`), but I've been using it locally with SBY to confirm that the different edge cases are able to be verified (e.g. when verifying HardFloat against symfpu while using the masked inputs to reduce solver time).
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2 changed files with 174 additions and 3 deletions
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@ -19,6 +19,7 @@ chformal -remove
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opt
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read_verilog -sv -formal $defs -D${rm} edges.sv
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chformal -remove -cover
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chformal -lower
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prep -top edges -flatten
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sat -set-assumes -prove-asserts -verify
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