mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-04 13:29:12 +00:00
Code Activity

Remove ice40_unlut call, simply do equiv_opt on synth_ice40

Browse source
This commit is contained in:
Eddie Hung 2019-08-07 21:33:56 -07:00
parent 35bf509603
commit d5e8c0e6d3
1 changed files with 1 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

4
tests/opt/opt_lut.ys
View file

@ -1,4 +1,2 @@
read_verilog opt_lut.v read_verilog opt_lut.v
synth_ice40 equiv_opt -map +/ice40/cells_sim.v -assert synth_ice40
ice40_unlut
equiv_opt -map +/ice40/cells_sim.v -assert opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3