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Remove ice40_unlut call, simply do equiv_opt on synth_ice40

This commit is contained in:
Eddie Hung 2019-08-07 21:33:56 -07:00
parent 35bf509603
commit d5e8c0e6d3

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@ -1,4 +1,2 @@
read_verilog opt_lut.v
synth_ice40
ice40_unlut
equiv_opt -map +/ice40/cells_sim.v -assert opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3
equiv_opt -map +/ice40/cells_sim.v -assert synth_ice40