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Added proper simulation model for CCU2D
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@ -1,3 +1,9 @@
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module LUT2(input A, B, output Z);
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parameter [3:0] INIT = 4'h0;
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wire [1:0] s1 = B ? INIT[ 3:2] : INIT[1:0];
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assign Z = A ? s1[1] : s1[0];
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endmodule
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module LUT4 #(
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module LUT4 #(
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parameter [15:0] INIT = 0
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parameter [15:0] INIT = 0
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) (
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) (
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@ -300,23 +306,37 @@ module DPR16X4C (
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endmodule
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endmodule
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// ---------------------------------------
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// ---------------------------------------
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(* blackbox *)
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(* lib_whitebox *)
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module CCU2D (
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module CCU2D (
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CIN,
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input CIN,
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A0, B0, C0, D0,
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input A0, B0, C0, D0, A1, B1, C1, D1,
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A1, B1, C1, D1,
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output S0, S1,
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S0, S1, COUT
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output COUT
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);
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);
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parameter [15:0] INIT0 = 16'h0000;
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parameter [15:0] INIT1 = 16'h0000;
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parameter INJECT1_0 = "YES";
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parameter INJECT1_1 = "YES";
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input CIN;
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// First half
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input A0, B0, C0, D0;
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wire LUT4_0, LUT2_0;
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input A1, B1, C1, D1;
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LUT4 #(.INIT(INIT0)) lut4_0(.A(A0), .B(B0), .C(C0), .D(D0), .Z(LUT4_0));
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output S0, S1, COUT;
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LUT2 #(.INIT(~INIT0[15:12])) lut2_0(.A(A0), .B(B0), .Z(LUT2_0));
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wire gated_cin_0 = (INJECT1_0 == "YES") ? 1'b0 : CIN;
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assign S0 = LUT4_0 ^ gated_cin_0;
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parameter [15:0] INIT0 = 16'h0000;
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wire gated_lut2_0 = (INJECT1_0 == "YES") ? 1'b0 : LUT2_0;
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parameter [15:0] INIT1 = 16'h0000;
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wire cout_0 = (~LUT4_0 & gated_lut2_0) | (LUT4_0 & CIN);
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parameter INJECT1_0 = "YES";
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parameter INJECT1_1 = "YES";
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// Second half
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wire LUT4_1, LUT2_1;
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LUT4 #(.INIT(INIT1)) lut4_1(.A(A1), .B(B1), .C(C1), .D(D1), .Z(LUT4_1));
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LUT2 #(.INIT(~INIT1[15:12])) lut2_1(.A(A1), .B(B1), .Z(LUT2_1));
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wire gated_cin_1 = (INJECT1_1 == "YES") ? 1'b0 : cout_0;
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assign S1 = LUT4_1 ^ gated_cin_1;
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wire gated_lut2_1 = (INJECT1_1 == "YES") ? 1'b0 : LUT2_1;
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assign COUT = (~LUT4_1 & gated_lut2_1) | (LUT4_1 & cout_0);
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endmodule
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endmodule
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(* blackbox *)
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(* blackbox *)
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