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```
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/-----------------------------------------------------------------------------\
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| yosys -- Yosys Open SYnthesis Suite |
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| Copyright (C) 2012 - 2016 Clifford Wolf <clifford@clifford.at> |
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| Permission to use, copy, modify, and/or distribute this software for any |
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| purpose with or without fee is hereby granted, provided that the above |
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| copyright notice and this permission notice appear in all copies. |
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| THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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| WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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| MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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| ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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| WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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| ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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| OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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\-----------------------------------------------------------------------------/
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yosys -- Yosys Open SYnthesis Suite
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yosys -- Yosys Open SYnthesis Suite
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Copyright (C) 2012 - 2016 Clifford Wolf <clifford@clifford.at>
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Permission to use, copy, modify, and/or distribute this software for any
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purpose with or without fee is hereby granted, provided that the above
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copyright notice and this permission notice appear in all copies.
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THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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```
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yosys – Yosys Open SYnthesis Suite
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===================================
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===================================
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This is a framework for RTL synthesis tools. It currently has
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This is a framework for RTL synthesis tools. It currently has
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@ -41,7 +38,6 @@ Web Site
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========
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========
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More information and documentation can be found on the Yosys web site:
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More information and documentation can be found on the Yosys web site:
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http://www.clifford.at/yosys/
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http://www.clifford.at/yosys/
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@ -61,9 +57,7 @@ prerequisites for building yosys:
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There are also pre-compiled Yosys binary packages for Ubuntu and Win32 as well
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There are also pre-compiled Yosys binary packages for Ubuntu and Win32 as well
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as a source distribution for Visual Studio. Visit the Yosys download page for
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as a source distribution for Visual Studio. Visit the Yosys download page for
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more information:
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more information: http://www.clifford.at/yosys/download.html
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http://www.clifford.at/yosys/download.html
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To configure the build system to use a specific compiler, use one of
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To configure the build system to use a specific compiler, use one of
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@ -74,7 +68,7 @@ For other compilers and build configurations it might be
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necessary to make some changes to the config section of the
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necessary to make some changes to the config section of the
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Makefile.
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Makefile.
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$ vi Makefile ..or..
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$ vi Makefile # ..or..
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$ vi Makefile.conf
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$ vi Makefile.conf
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To build Yosys simply type 'make' in this directory.
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To build Yosys simply type 'make' in this directory.
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@ -195,8 +189,8 @@ you can use the file examples/cmos/cmos_cells.lib from the yosys sources.
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Liberty file downloads for and information about free and open ASIC standard
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Liberty file downloads for and information about free and open ASIC standard
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cell libraries can be found here:
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cell libraries can be found here:
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http://www.vlsitechnology.org/html/libraries.html
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- http://www.vlsitechnology.org/html/libraries.html
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http://www.vlsitechnology.org/synopsys/vsclib013.lib
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- http://www.vlsitechnology.org/synopsys/vsclib013.lib
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The command "synth" provides a good default synthesis script (see "help synth").
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The command "synth" provides a good default synthesis script (see "help synth").
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If possible a synthesis script should borrow from "synth". For example:
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If possible a synthesis script should borrow from "synth". For example:
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@ -243,7 +237,7 @@ Verilog Attributes and non-standard features
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(also the non-standard "// synopsys parallel_case" directive)
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(also the non-standard "// synopsys parallel_case" directive)
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- The "// synopsys translate_off" and "// synopsys translate_on"
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- The "// synopsys translate_off" and "// synopsys translate_on"
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directives are also supported (but the use of `ifdef .. `endif
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directives are also supported (but the use of ``` `ifdef .. `endif ```
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is strongly recommended instead).
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is strongly recommended instead).
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- The "nomem2reg" attribute on modules or arrays prohibits the
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- The "nomem2reg" attribute on modules or arrays prohibits the
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through the synthesis. When entities are combined, a new |-separated
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through the synthesis. When entities are combined, a new |-separated
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string is created that contains all the string from the original entities.
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string is created that contains all the string from the original entities.
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- In addition to the (* ... *) attribute syntax, yosys supports
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- In addition to the ``(* ... *)`` attribute syntax, yosys supports
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the non-standard {* ... *} attribute syntax to set default attributes
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the non-standard ``{* ... *}`` attribute syntax to set default attributes
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for everything that comes after the {* ... *} statement. (Reset
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for everything that comes after the ``{* ... *}`` statement. (Reset
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by adding an empty {* *} statement.)
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by adding an empty ``{* *}`` statement.)
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- In module parameter and port declarations, and cell port and parameter
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- In module parameter and port declarations, and cell port and parameter
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lists, a trailing comma is ignored. This simplifies writing verilog code
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lists, a trailing comma is ignored. This simplifies writing verilog code
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- To run `make manual` you need to have installed yosys with `make install`,
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- To run `make manual` you need to have installed yosys with `make install`,
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otherwise it will fail on finding `kernel/yosys.h` while building
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otherwise it will fail on finding `kernel/yosys.h` while building
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`PRESENTATION_Prog`.
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`PRESENTATION_Prog`.
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