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Revisions (#4)

* area should be 1 for all LUTs

* clean up macros

* add log_assert to fail noisily when encountering oddly configured DFF

* clean help msg

* flatten set to true by default

* update

* merge mult tests

* remove redundant test

* move all dsp tests to single file and remove redundant tests

* update ram tests

* add more dff tests

* fix c++20 compile errors

* add option to dump verilog

* default to use abc9

* remove -abc9 option since its the default now

---------

Co-authored-by: tony <minchunlin@gmail.com>
This commit is contained in:
Tony Min 2024-07-08 10:57:16 -04:00 committed by GitHub
parent 6fe0e00050
commit d41688f7d7
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GPG key ID: B5690EEEBB952194
44 changed files with 435 additions and 1118 deletions

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@ -218,6 +218,7 @@ struct MicrochipDffOptPass : public Pass {
worthy_post_ce = true;
} else if (sig_CE.data != State::S1) {
// Strange. Should not happen in a reasonable flow, so bail.
log_assert(false); // This DFF is always off
continue;
} else {
lut_d_post_ce = lut_d;
@ -241,6 +242,7 @@ struct MicrochipDffOptPass : public Pass {
worthy_post_s = true;
} else if (sig_S.data != (inv_s ? State::S1 : State::S0)) {
// Strange. Should not happen in a reasonable flow, so bail.
log_assert(false); // DFF is always in set mode
continue;
}
}
@ -263,6 +265,7 @@ struct MicrochipDffOptPass : public Pass {
worthy_post_r = true;
} else if (sig_R.data != (inv_r ? State::S1 : State::S0)) {
// Strange. Should not happen in a reasonable flow, so bail.
log_assert(false); // DFF is always in reset mode
continue;
}
}