From b7d013e6bfbf3d1a3a07f8592fd9f162f5362327 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Wed, 4 Mar 2026 07:46:40 +0100 Subject: [PATCH 1/3] Fix help message for equiv passes --- passes/equiv/equiv_induct.cc | 2 +- passes/equiv/equiv_simple.cc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/passes/equiv/equiv_induct.cc b/passes/equiv/equiv_induct.cc index d843fef67..e4480c893 100644 --- a/passes/equiv/equiv_induct.cc +++ b/passes/equiv/equiv_induct.cc @@ -174,7 +174,7 @@ struct EquivInductPass : public Pass { log("Only selected $equiv cells are proven and only selected cells are used to\n"); log("perform the proof.\n"); log("\n"); - EquivBasicConfig::help("4"); + log("%s", EquivBasicConfig::help("4")); log("\n"); log("This command is very effective in proving complex sequential circuits, when\n"); log("the internal state of the circuit quickly propagates to $equiv cells.\n"); diff --git a/passes/equiv/equiv_simple.cc b/passes/equiv/equiv_simple.cc index ff6df295c..e498928c3 100644 --- a/passes/equiv/equiv_simple.cc +++ b/passes/equiv/equiv_simple.cc @@ -428,7 +428,7 @@ struct EquivSimplePass : public Pass { log("\n"); log("This command tries to prove $equiv cells using a simple direct SAT approach.\n"); log("\n"); - EquivSimpleConfig::help("1"); + log("%s", EquivSimpleConfig::help("1")); log("\n"); } void execute(std::vector args, Design *design) override From 70a11c6bf0e8dd669f56c7da3587f78b405138e2 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Wed, 4 Mar 2026 07:46:57 +0100 Subject: [PATCH 2/3] Release version 0.63 --- CHANGELOG | 14 +++++++++++++- Makefile | 4 ++-- docs/source/conf.py | 2 +- 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/CHANGELOG b/CHANGELOG index e345a8514..4904d9639 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,8 +2,20 @@ List of major changes and improvements between releases ======================================================= -Yosys 0.62 .. Yosys 0.63-dev +Yosys 0.62 .. Yosys 0.63 -------------------------- + * Various + - Added DSP inference for Gowin GW1N and GW2A. + - Added support for subtract in preadder for Xilinx arch. + - Added infrastructure to run a sat solver as a command. + + * New commands and options + - Added "-ignore-unknown-cells" option to "equiv_induct" + and "equiv_simple" pass. + - Added "-force-params" option to "memory_libmap" pass. + - Added "-select-solver" option to "sat" pass. + - Added "-default_params" option to "write_verilog" pass. + - Added "-nodsp" option to "synth_gowin" pass. Yosys 0.61 .. Yosys 0.62 -------------------------- diff --git a/Makefile b/Makefile index 0a15c2b23..5a2cb66f5 100644 --- a/Makefile +++ b/Makefile @@ -161,7 +161,7 @@ ifeq ($(OS), Haiku) CXXFLAGS += -D_DEFAULT_SOURCE endif -YOSYS_VER := 0.62 +YOSYS_VER := 0.63 ifneq (, $(shell command -v git 2>/dev/null)) ifneq (, $(shell git rev-parse --git-dir 2>/dev/null)) @@ -170,7 +170,7 @@ ifneq (, $(shell git rev-parse --git-dir 2>/dev/null)) YOSYS_VER := $(YOSYS_VER)+$(GIT_COMMIT_COUNT) endif else - YOSYS_VER := $(YOSYS_VER)+post +# YOSYS_VER := $(YOSYS_VER)+post endif endif diff --git a/docs/source/conf.py b/docs/source/conf.py index a7da22d97..458040db0 100644 --- a/docs/source/conf.py +++ b/docs/source/conf.py @@ -6,7 +6,7 @@ import os project = 'YosysHQ Yosys' author = 'YosysHQ GmbH' copyright ='2026 YosysHQ GmbH' -yosys_ver = "0.62" +yosys_ver = "0.63" # select HTML theme html_theme = 'furo-ys' From 228052bfb3e4a733e4bdb3fe57cdc7692a47e220 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Wed, 4 Mar 2026 08:45:13 +0100 Subject: [PATCH 3/3] Next dev cycle --- CHANGELOG | 3 +++ Makefile | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/CHANGELOG b/CHANGELOG index 4904d9639..372a59d58 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,9 @@ List of major changes and improvements between releases ======================================================= +Yosys 0.63 .. Yosys 0.64-dev +-------------------------- + Yosys 0.62 .. Yosys 0.63 -------------------------- * Various diff --git a/Makefile b/Makefile index 5a2cb66f5..507c74a63 100644 --- a/Makefile +++ b/Makefile @@ -170,7 +170,7 @@ ifneq (, $(shell git rev-parse --git-dir 2>/dev/null)) YOSYS_VER := $(YOSYS_VER)+$(GIT_COMMIT_COUNT) endif else -# YOSYS_VER := $(YOSYS_VER)+post + YOSYS_VER := $(YOSYS_VER)+post endif endif