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hierarchy: morphCell

This commit is contained in:
Emil J. Tywoniak 2024-07-12 10:41:05 +02:00
parent 6922a68cea
commit d3d5738238
3 changed files with 37 additions and 20 deletions

View file

@ -2473,7 +2473,9 @@ RTLIL::Cell *RTLIL::Module::morphCell(RTLIL::IdString type, RTLIL::Cell *old)
// old->type = type;
// return old;
// }
// TODO xtrace
if (old->type == type)
return old;
if (yosys_xtrace) {
log("#X# Morphing %s.%s from type %s to %s\n", log_id(this), log_id(old), log_id(old->type), log_id(type));
log_backtrace("-X- ", yosys_xtrace-1);
@ -2487,7 +2489,7 @@ RTLIL::Cell *RTLIL::Module::morphCell(RTLIL::IdString type, RTLIL::Cell *old)
new_cell->name = old->name;
log_assert(refcount_cells_ == 0);
cells_[new_cell->name] = new_cell;
delete old;
remove(old);
return new_cell;
}

View file

@ -1794,7 +1794,10 @@ public:
parent->legacy->parameters.erase(paramname);
}
// The need for this function implies setPort will be used on incompat types
void clear() const {}
void clear() const {
if (parent->is_legacy())
parent->legacy->parameters.clear();
}
// AAA
class iterator {
typedef std::bidirectional_iterator_tag iterator_category;
@ -2056,9 +2059,16 @@ public:
}
}
// The need for this function implies setPort will be used on incompat types
void erase(const RTLIL::IdString& portname) { (void)portname; }
void erase(const RTLIL::IdString &portname) const
{
if (parent->is_legacy())
parent->legacy->connections_.erase(portname);
}
// The need for this function implies setPort will be used on incompat types
void clear() const {}
void clear() const {
if (parent->is_legacy())
parent->legacy->connections_.clear();
}
bool empty() const {
return !size();
}