mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-02 12:37:53 +00:00
Code Activity

s/NEW_ID/NEWER_ID/g

Browse source
This commit is contained in:
Emil J. Tywoniak 2025-09-16 17:43:02 +02:00
parent e4d4de1020
commit d2b28d7a25
130 changed files with 1275 additions and 1275 deletions
Download patch file Download diff file Expand all files Collapse all files

4
passes/proc/proc_rom.cc
View file

@ -151,8 +151,8 @@ struct RomWorker
}
// Ok, let's do it.
SigSpec rdata = module->addWire(NEW_ID, GetSize(lhs));
Mem mem(module, NEW_ID, GetSize(lhs), 0, 1 << abits);
SigSpec rdata = module->addWire(NEWER_ID, GetSize(lhs));
Mem mem(module, NEWER_ID, GetSize(lhs), 0, 1 << abits);
mem.attributes = sw->attributes;
Const::Builder builder(mem.size * GetSize(lhs));