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https://github.com/YosysHQ/yosys
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Fixed bug in sequential sat proofs and improved handling of asserts
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parent
ecdf1f5577
commit
d267bcde4e
3 changed files with 45 additions and 9 deletions
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@ -38,7 +38,7 @@ struct SatGen
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SigMap *sigmap;
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std::string prefix;
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SigPool initial_state;
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RTLIL::SigSpec asserts_a, asserts_en;
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std::map<std::string, RTLIL::SigSpec> asserts_a, asserts_en;
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bool ignore_div_by_zero;
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bool model_undef;
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@ -97,15 +97,23 @@ struct SatGen
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return importSigSpecWorker(sig, pf, true, false);
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}
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void getAsserts(RTLIL::SigSpec &sig_a, RTLIL::SigSpec &sig_en, int timestep = -1)
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{
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std::string pf = prefix + (timestep == -1 ? "" : stringf("@%d:", timestep));
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sig_a = asserts_a[pf];
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sig_en = asserts_en[pf];
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}
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int importAsserts(int timestep = -1)
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{
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std::vector<int> check_bits, enable_bits;
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std::string pf = prefix + (timestep == -1 ? "" : stringf("@%d:", timestep));
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if (model_undef) {
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check_bits = ez->vec_and(ez->vec_not(importUndefSigSpec(asserts_a, timestep)), importDefSigSpec(asserts_a, timestep));
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enable_bits = ez->vec_and(ez->vec_not(importUndefSigSpec(asserts_en, timestep)), importDefSigSpec(asserts_en, timestep));
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check_bits = ez->vec_and(ez->vec_not(importUndefSigSpec(asserts_a[pf], timestep)), importDefSigSpec(asserts_a[pf], timestep));
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enable_bits = ez->vec_and(ez->vec_not(importUndefSigSpec(asserts_en[pf], timestep)), importDefSigSpec(asserts_en[pf], timestep));
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} else {
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check_bits = importDefSigSpec(asserts_a, timestep);
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enable_bits = importDefSigSpec(asserts_en, timestep);
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check_bits = importDefSigSpec(asserts_a[pf], timestep);
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enable_bits = importDefSigSpec(asserts_en[pf], timestep);
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}
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return ez->vec_reduce_and(ez->vec_or(check_bits, ez->vec_not(enable_bits)));
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}
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@ -781,8 +789,9 @@ struct SatGen
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if (cell->type == "$assert")
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{
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asserts_a.append((*sigmap)(cell->connections.at("\\A")));
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asserts_en.append((*sigmap)(cell->connections.at("\\EN")));
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std::string pf = prefix + (timestep == -1 ? "" : stringf("@%d:", timestep));
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asserts_a[pf].append((*sigmap)(cell->connections.at("\\A")));
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asserts_en[pf].append((*sigmap)(cell->connections.at("\\EN")));
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return true;
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}
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