3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-09-27 11:49:02 +00:00

Instead of using builtin_ff_cell_types() directly, go through a method Cell::is_builtin_ff()

This commit is contained in:
Robert O'Callahan 2025-09-17 03:23:52 +00:00
parent b95549b469
commit d24488d3a5
32 changed files with 61 additions and 51 deletions

View file

@ -373,7 +373,7 @@ void AbcModuleState::mark_port(const AbcSigMap &assign_map, RTLIL::SigSpec sig)
bool AbcModuleState::extract_cell(const AbcSigMap &assign_map, RTLIL::Module *module, RTLIL::Cell *cell, bool keepff)
{
if (RTLIL::builtin_ff_cell_types().count(cell->type)) {
if (cell->is_builtin_ff()) {
FfData ff(&initvals, cell);
gate_type_t type = G(FF);
if (!ff.has_clk)
@ -2427,7 +2427,7 @@ struct AbcPass : public Pass {
}
}
if (!RTLIL::builtin_ff_cell_types().count(cell->type))
if (!cell->is_builtin_ff())
continue;
FfData ff(&initvals, cell);