mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-04 06:53:59 +00:00
Code Activity

Instead of using builtin_ff_cell_types() directly, go through a method Cell::is_builtin_ff()

Browse source
This commit is contained in:
Robert O'Callahan 2025-09-17 03:23:52 +00:00
parent b95549b469
commit d24488d3a5
32 changed files with 61 additions and 51 deletions
Download patch file Download diff file Expand all files Collapse all files

4
passes/equiv/equiv_simple.cc
View file

@ -93,7 +93,7 @@ struct EquivSimpleWorker
for (auto &conn : cell->connections())
if (yosys_celltypes.cell_input(cell->type, conn.first))
for (auto bit : model.sigmap(conn.second)) {
if (RTLIL::builtin_ff_cell_types().count(cell->type)) {
if (cell->is_builtin_ff()) {
if (!conn.first.in(ID::CLK, ID::C))
next_seed.insert(bit);
} else
@ -231,7 +231,7 @@ struct EquivSimpleWorker
static void report_missing_model(Cell* cell)
{
if (RTLIL::builtin_ff_cell_types().count(cell->type))
if (cell->is_builtin_ff())
log_cmd_error("No SAT model available for async FF cell %s (%s). Consider running `async2sync` or `clk2fflogic` first.\n", log_id(cell), log_id(cell->type));
else
log_cmd_error("No SAT model available for cell %s (%s).\n", log_id(cell), log_id(cell->type));