3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-09-30 13:19:05 +00:00

Instead of using builtin_ff_cell_types() directly, go through a method Cell::is_builtin_ff()

This commit is contained in:
Robert O'Callahan 2025-09-17 03:23:52 +00:00
parent b95549b469
commit d24488d3a5
32 changed files with 61 additions and 51 deletions

View file

@ -87,7 +87,7 @@ static_assert(check_well_known_id_order());
dict<std::string, std::string> RTLIL::constpad;
const pool<IdString> &RTLIL::builtin_ff_cell_types() {
static const pool<IdString> &builtin_ff_cell_types_internal() {
static const pool<IdString> res = {
ID($sr),
ID($ff),
@ -238,6 +238,10 @@ const pool<IdString> &RTLIL::builtin_ff_cell_types() {
return res;
}
const pool<IdString> &RTLIL::builtin_ff_cell_types() {
return builtin_ff_cell_types_internal();
}
#define check(condition) log_assert(condition && "malformed Const union")
const Const::bitvectype& Const::get_bits() const {
@ -4497,6 +4501,10 @@ bool RTLIL::Cell::is_mem_cell() const
return type.in(ID($mem), ID($mem_v2)) || has_memid();
}
bool RTLIL::Cell::is_builtin_ff() const {
return builtin_ff_cell_types_internal().count(type) > 0;
}
RTLIL::SigChunk::SigChunk(const RTLIL::SigBit &bit)
{
wire = bit.wire;