mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-03 21:09:12 +00:00
Code Activity

lut2mux: handle 1-bit INIT constant in $lut cells.

Browse source 
This pass already handles INIT constants shorter than 2^width, but
that was not done for the recursion base case.
This commit is contained in:
whitequark 2018-12-05 19:27:48 +00:00
parent 88217d0157
commit d1f2cb01dc
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
passes/techmap/lut2mux.cc
View file

@ -32,7 +32,7 @@ int lut2mux(Cell *cell)
if (GetSize(sig_a) == 1)
{
cell->module->addMuxGate(NEW_ID, lut[0], lut[1], sig_a, sig_y);
cell->module->addMuxGate(NEW_ID, lut.extract(0)[0], lut.extract(1)[0], sig_a, sig_y);
}
else
{