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sim.cc: Move cycle check

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Calling `throw dst_end_of_data_exception()` when the desired number of cycles has been reached means that the fst reader can't tidy up after itself and leads to memory leaks.
This doesn't happen when the `-stop` flag is used because the `Yosys::FstData` struct tracks the end time and skips the outer callback if the simulation has gone past the desired end time.
Move cycle checking into the inner callback along with the time checking means that the outer callback no longer needs to throw an exception in order to stop checking further values, while still allowing the fst reader to finish reading and deallocate memory.
This commit is contained in:
Krystine Sherwin 2025-05-12 12:48:01 +12:00
parent cc402ee065
commit d0b9a0cb98
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3 changed files with 55 additions and 62 deletions
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17
kernel/fstdata.cc
View file

@ -206,6 +206,7 @@ static void reconstruct_clb_attimes(void *user_data, uint64_t pnt_time, fstHandl
void FstData::reconstruct_callback_attimes(uint64_t pnt_time, fstHandle pnt_facidx, const unsigned char *pnt_value, uint32_t /* plen */) void FstData::reconstruct_callback_attimes(uint64_t pnt_time, fstHandle pnt_facidx, const unsigned char *pnt_value, uint32_t /* plen */)
{ {
if (pnt_time > end_time || !pnt_value) return; if (pnt_time > end_time || !pnt_value) return;
if (curr_cycle > last_cycle) return;
// if we are past the timestamp // if we are past the timestamp
bool is_clock = false; bool is_clock = false;
if (!all_samples) { if (!all_samples) {
@ -225,6 +226,7 @@ void FstData::reconstruct_callback_attimes(uint64_t pnt_time, fstHandle pnt_faci
if (pnt_time > last_time) { if (pnt_time > last_time) {
if (all_samples) { if (all_samples) {
callback(last_time); callback(last_time);
curr_cycle++;
last_time = pnt_time; last_time = pnt_time;
} else { } else {
if (is_clock) { if (is_clock) {
@ -232,6 +234,7 @@ void FstData::reconstruct_callback_attimes(uint64_t pnt_time, fstHandle pnt_faci
std::string prev = past_data[pnt_facidx]; std::string prev = past_data[pnt_facidx];
if ((prev!="1" && val=="1") || (prev!="0" && val=="0")) { if ((prev!="1" && val=="1") || (prev!="0" && val=="0")) {
callback(last_time); callback(last_time);
curr_cycle++;
last_time = pnt_time; last_time = pnt_time;
} }
} }
@ -241,12 +244,14 @@ void FstData::reconstruct_callback_attimes(uint64_t pnt_time, fstHandle pnt_faci
last_data[pnt_facidx] = std::string((const char *)pnt_value); last_data[pnt_facidx] = std::string((const char *)pnt_value);
} }
void FstData::reconstructAllAtTimes(std::vector<fstHandle> &signal, uint64_t start, uint64_t end, CallbackFunction cb) void FstData::reconstructAllAtTimes(std::vector<fstHandle> &signal, uint64_t start, uint64_t end, unsigned int end_cycle, CallbackFunction cb)
{ {
clk_signals = signal; clk_signals = signal;
callback = cb; callback = cb;
start_time = start; start_time = start;
end_time = end; end_time = end;
curr_cycle = 0;
last_cycle = end_cycle;
last_data.clear(); last_data.clear();
last_time = start_time; last_time = start_time;
past_data.clear(); past_data.clear();
@ -256,12 +261,16 @@ void FstData::reconstructAllAtTimes(std::vector<fstHandle> &signal, uint64_t sta
fstReaderSetUnlimitedTimeRange(ctx); fstReaderSetUnlimitedTimeRange(ctx);
fstReaderSetFacProcessMaskAll(ctx); fstReaderSetFacProcessMaskAll(ctx);
fstReaderIterBlocks2(ctx, reconstruct_clb_attimes, reconstruct_clb_varlen_attimes, this, nullptr); fstReaderIterBlocks2(ctx, reconstruct_clb_attimes, reconstruct_clb_varlen_attimes, this, nullptr);
if (last_time!=end_time) { if (last_time!=end_time && curr_cycle < last_cycle) {
past_data = last_data; past_data = last_data;
callback(last_time); callback(last_time);
curr_cycle++;
}
if (curr_cycle < last_cycle) {
past_data = last_data;
callback(end_time);
curr_cycle++;
} }
past_data = last_data;
callback(end_time);
} }
std::string FstData::valueOf(fstHandle signal) std::string FstData::valueOf(fstHandle signal)

4
kernel/fstdata.h
View file

@ -50,7 +50,7 @@ class FstData
std::vector<FstVar>& getVars() { return vars; }; std::vector<FstVar>& getVars() { return vars; };
void reconstruct_callback_attimes(uint64_t pnt_time, fstHandle pnt_facidx, const unsigned char *pnt_value, uint32_t plen); void reconstruct_callback_attimes(uint64_t pnt_time, fstHandle pnt_facidx, const unsigned char *pnt_value, uint32_t plen);
void reconstructAllAtTimes(std::vector<fstHandle> &signal, uint64_t start_time, uint64_t end_time, CallbackFunction cb); void reconstructAllAtTimes(std::vector<fstHandle> &signal, uint64_t start_time, uint64_t end_time, unsigned int end_cycle, CallbackFunction cb);
std::string valueOf(fstHandle signal); std::string valueOf(fstHandle signal);
fstHandle getHandle(std::string name); fstHandle getHandle(std::string name);
@ -73,6 +73,8 @@ private:
std::string timescale_str; std::string timescale_str;
uint64_t start_time; uint64_t start_time;
uint64_t end_time; uint64_t end_time;
unsigned int last_cycle;
unsigned int curr_cycle;
CallbackFunction callback; CallbackFunction callback;
std::vector<fstHandle> clk_signals; std::vector<fstHandle> clk_signals;
bool all_samples; bool all_samples;

96
passes/sat/sim.cc
View file

@ -1546,36 +1546,27 @@ struct SimWorker : SimShared
log(" for %d clock cycle(s)",numcycles); log(" for %d clock cycle(s)",numcycles);
log("\n"); log("\n");
bool all_samples = fst_clock.empty(); bool all_samples = fst_clock.empty();
unsigned int end_cycle = cycles_set ? numcycles*2 : INT_MAX;
try { fst->reconstructAllAtTimes(fst_clock, startCount, stopCount, end_cycle, [&](uint64_t time) {
fst->reconstructAllAtTimes(fst_clock, startCount, stopCount, [&](uint64_t time) { if (verbose)
if (verbose) log("Co-simulating %s %d [%lu%s].\n", (all_samples ? "sample" : "cycle"), cycle, (unsigned long)time, fst->getTimescaleString());
log("Co-simulating %s %d [%lu%s].\n", (all_samples ? "sample" : "cycle"), cycle, (unsigned long)time, fst->getTimescaleString()); bool did_something = top->setInputs();
bool did_something = top->setInputs();
if (initial) { if (initial) {
if (!fst_noinit) did_something |= top->setInitState(); if (!fst_noinit) did_something |= top->setInitState();
initialize_stable_past(); initialize_stable_past();
initial = false; initial = false;
} }
if (did_something) if (did_something)
update(true); update(true);
register_output_step(time); register_output_step(time);
bool status = top->checkSignals(); bool status = top->checkSignals();
if (status) if (status)
log_error("Signal difference\n"); log_error("Signal difference\n");
cycle++; cycle++;
});
// Limit to number of cycles if provided
if (cycles_set && cycle > numcycles *2)
throw fst_end_of_data_exception();
if (time==stopCount)
throw fst_end_of_data_exception();
});
} catch(fst_end_of_data_exception) {
// end of data detected
}
write_output_files(); write_output_files();
delete fst; delete fst;
@ -2248,40 +2239,31 @@ struct SimWorker : SimShared
log("Writing data to `%s`\n", (tb_filename+".txt").c_str()); log("Writing data to `%s`\n", (tb_filename+".txt").c_str());
std::ofstream data_file(tb_filename+".txt"); std::ofstream data_file(tb_filename+".txt");
std::stringstream initstate; std::stringstream initstate;
try { unsigned int end_cycle = cycles_set ? numcycles*2 : INT_MAX;
fst->reconstructAllAtTimes(fst_clock, startCount, stopCount, [&](uint64_t time) { fst->reconstructAllAtTimes(fst_clock, startCount, stopCount, end_cycle, [&](uint64_t time) {
for(auto &item : clocks) for(auto &item : clocks)
data_file << stringf("%s",fst->valueOf(item.second).c_str()); data_file << stringf("%s",fst->valueOf(item.second).c_str());
for(auto &item : inputs) for(auto &item : inputs)
data_file << stringf("%s",fst->valueOf(item.second).c_str()); data_file << stringf("%s",fst->valueOf(item.second).c_str());
for(auto &item : outputs) for(auto &item : outputs)
data_file << stringf("%s",fst->valueOf(item.second).c_str()); data_file << stringf("%s",fst->valueOf(item.second).c_str());
data_file << stringf("%s\n",Const(time-prev_time).as_string().c_str()); data_file << stringf("%s\n",Const(time-prev_time).as_string().c_str());
if (time==startCount) { if (time==startCount) {
// initial state // initial state
for(auto var : fst->getVars()) { for(auto var : fst->getVars()) {
if (var.is_reg && !Const::from_string(fst->valueOf(var.id).c_str()).is_fully_undef()) { if (var.is_reg && !Const::from_string(fst->valueOf(var.id).c_str()).is_fully_undef()) {
if (var.scope == scope) { if (var.scope == scope) {
initstate << stringf("\t\tuut.%s = %d'b%s;\n", var.name.c_str(), var.width, fst->valueOf(var.id).c_str()); initstate << stringf("\t\tuut.%s = %d'b%s;\n", var.name.c_str(), var.width, fst->valueOf(var.id).c_str());
} else if (var.scope.find(scope+".")==0) { } else if (var.scope.find(scope+".")==0) {
initstate << stringf("\t\tuut.%s.%s = %d'b%s;\n",var.scope.substr(scope.size()+1).c_str(), var.name.c_str(), var.width, fst->valueOf(var.id).c_str()); initstate << stringf("\t\tuut.%s.%s = %d'b%s;\n",var.scope.substr(scope.size()+1).c_str(), var.name.c_str(), var.width, fst->valueOf(var.id).c_str());
}
} }
} }
} }
cycle++; }
prev_time = time; cycle++;
prev_time = time;
// Limit to number of cycles if provided });
if (cycles_set && cycle > numcycles *2)
throw fst_end_of_data_exception();
if (time==stopCount)
throw fst_end_of_data_exception();
});
} catch(fst_end_of_data_exception) {
// end of data detected
}
f << stringf("\treg [0:%d] data [0:%d];\n", data_len-1, cycle-1); f << stringf("\treg [0:%d] data [0:%d];\n", data_len-1, cycle-1);
f << "\tinitial begin;\n"; f << "\tinitial begin;\n";