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sim.cc: Move cycle check

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Calling `throw dst_end_of_data_exception()` when the desired number of cycles has been reached means that the fst reader can't tidy up after itself and leads to memory leaks.
This doesn't happen when the `-stop` flag is used because the `Yosys::FstData` struct tracks the end time and skips the outer callback if the simulation has gone past the desired end time.
Move cycle checking into the inner callback along with the time checking means that the outer callback no longer needs to throw an exception in order to stop checking further values, while still allowing the fst reader to finish reading and deallocate memory.
This commit is contained in:
Krystine Sherwin 2025-05-12 12:48:01 +12:00
parent cc402ee065
commit d0b9a0cb98
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3 changed files with 55 additions and 62 deletions
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kernel/fstdata.h
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@ -50,7 +50,7 @@ class FstData
std::vector<FstVar>& getVars() { return vars; };
void reconstruct_callback_attimes(uint64_t pnt_time, fstHandle pnt_facidx, const unsigned char *pnt_value, uint32_t plen);
void reconstructAllAtTimes(std::vector<fstHandle> &signal, uint64_t start_time, uint64_t end_time, CallbackFunction cb);
void reconstructAllAtTimes(std::vector<fstHandle> &signal, uint64_t start_time, uint64_t end_time, unsigned int end_cycle, CallbackFunction cb);
std::string valueOf(fstHandle signal);
fstHandle getHandle(std::string name);
@ -73,6 +73,8 @@ private:
std::string timescale_str;
uint64_t start_time;
uint64_t end_time;
unsigned int last_cycle;
unsigned int curr_cycle;
CallbackFunction callback;
std::vector<fstHandle> clk_signals;
bool all_samples;