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hashlib: redo interface for flexibility

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This commit is contained in:
Emil J. Tywoniak 2024-10-01 15:12:03 +02:00
parent 7a362f1f74
commit d071489ab1
35 changed files with 542 additions and 386 deletions
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12
kernel/timinginfo.h
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@ -36,7 +36,6 @@ struct TimingInfo
explicit NameBit(const RTLIL::SigBit &b) : name(b.wire->name), offset(b.offset) {}
bool operator==(const NameBit& nb) const { return nb.name == name && nb.offset == offset; }
bool operator!=(const NameBit& nb) const { return !operator==(nb); }
unsigned int hash() const { return mkhash_add(name.hash(), offset); }
std::optional<SigBit> get_connection(RTLIL::Cell *cell) {
if (!cell->hasPort(name))
return {};
@ -45,6 +44,11 @@ struct TimingInfo
return {};
return port[offset];
}
Hasher hash_acc(Hasher h) const {
h.acc(name);
h.acc(offset);
return h;
}
};
struct BitBit
{
@ -52,7 +56,11 @@ struct TimingInfo
BitBit(const NameBit &first, const NameBit &second) : first(first), second(second) {}
BitBit(const SigBit &first, const SigBit &second) : first(first), second(second) {}
bool operator==(const BitBit& bb) const { return bb.first == first && bb.second == second; }
unsigned int hash() const { return mkhash_add(first.hash(), second.hash()); }
Hasher hash_acc(Hasher h) const {
h.acc(first);
h.acc(second);
return h;
}
};
struct ModuleTiming