From cf75a6ef4581edf7730651033d1724e5a32bd4c8 Mon Sep 17 00:00:00 2001 From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com> Date: Thu, 21 May 2026 09:46:56 +1200 Subject: [PATCH] verific: Fix upto ranges --- frontends/verific/verific.cc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index f909e8e05..009388206 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -1661,11 +1661,13 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma RTLIL::SigSpec min_addr, max_addr; auto typeRange = net->GetOrigTypeRange(); while (typeRange) { - RTLIL::SigSpec min_addr_chunk(RTLIL::Const(typeRange->RightRangeBound(), typeRange->NumBits())); + auto left = typeRange->LeftRangeBound(); + auto right = typeRange->RightRangeBound(); + RTLIL::SigSpec min_addr_chunk(RTLIL::Const(left > right ? right : left, typeRange->NumBits())); min_addr_chunk.reverse(); min_addr.append(min_addr_chunk); - RTLIL::SigSpec max_addr_chunk(RTLIL::Const(typeRange->LeftRangeBound(), typeRange->NumBits())); + RTLIL::SigSpec max_addr_chunk(RTLIL::Const(left > right ? left : right, typeRange->NumBits())); max_addr_chunk.reverse(); max_addr.append(max_addr_chunk);