mirror of
https://github.com/YosysHQ/yosys
synced 2025-06-06 22:23:23 +00:00
Added cast to type support (#4284)
This commit is contained in:
parent
8e1e2b9a39
commit
ce7db661a8
4 changed files with 573 additions and 2 deletions
|
@ -3506,6 +3506,12 @@ basic_expr:
|
|||
$$ = new AstNode(AST_CAST_SIZE, $1, $4);
|
||||
SET_AST_NODE_LOC($$, @1, @4);
|
||||
} |
|
||||
typedef_base_type OP_CAST '(' expr ')' {
|
||||
if (!sv_mode)
|
||||
frontend_verilog_yyerror("Static cast is only supported in SystemVerilog mode.");
|
||||
$$ = new AstNode(AST_CAST_SIZE, $1, $4);
|
||||
SET_AST_NODE_LOC($$, @1, @4);
|
||||
} |
|
||||
'(' expr '=' expr ')' {
|
||||
ensureAsgnExprAllowed();
|
||||
AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, $4);
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue