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https://github.com/YosysHQ/yosys
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Added cast to type support (#4284)
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parent
8e1e2b9a39
commit
ce7db661a8
4 changed files with 573 additions and 2 deletions
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@ -478,6 +478,10 @@ void AstNode::dumpVlog(FILE *f, std::string indent) const
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fprintf(f, ";\n");
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break;
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case AST_WIRETYPE:
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fprintf(f, "%s", id2vl(str).c_str());
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break;
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case AST_MEMORY:
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fprintf(f, "%s" "memory", indent.c_str());
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if (is_signed)
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@ -694,7 +698,17 @@ void AstNode::dumpVlog(FILE *f, std::string indent) const
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break;
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case AST_CAST_SIZE:
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children[0]->dumpVlog(f, "");
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switch (children[0]->type)
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{
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case AST_WIRE:
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if (children[0]->children.size() > 0)
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children[0]->children[0]->dumpVlog(f, "");
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else
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fprintf(f, "%d'", children[0]->range_left - children[0]->range_right + 1);
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break;
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default:
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children[0]->dumpVlog(f, "");
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}
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fprintf(f, "'(");
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children[1]->dumpVlog(f, "");
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fprintf(f, ")");
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@ -1500,11 +1500,69 @@ bool AstNode::simplify(bool const_fold, int stage, int width_hint, bool sign_hin
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}
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break;
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case AST_CAST_SIZE: {
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int width = 1;
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AstNode *node;
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AstNode *child = children[0];
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if (child->type == AST_WIRE) {
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if (child->children.size() == 0) {
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// Base type (e.g., int)
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width = child->range_left - child->range_right +1;
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node = mkconst_int(width, child->is_signed);
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} else {
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// User defined type
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log_assert(child->children[0]->type == AST_WIRETYPE);
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const std::string &type_name = child->children[0]->str;
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if (!current_scope.count(type_name))
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input_error("Unknown identifier `%s' used as type name\n", type_name.c_str());
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AstNode *resolved_type_node = current_scope.at(type_name);
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if (resolved_type_node->type != AST_TYPEDEF)
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input_error("`%s' does not name a type\n", type_name.c_str());
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log_assert(resolved_type_node->children.size() == 1);
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AstNode *template_node = resolved_type_node->children[0];
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// Ensure typedef itself is fully simplified
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while (template_node->simplify(const_fold, stage, width_hint, sign_hint)) {};
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switch (template_node->type)
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{
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case AST_WIRE: {
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if (template_node->children.size() > 0 && template_node->children[0]->type == AST_RANGE)
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width = range_width(this, template_node->children[0]);
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child->delete_children();
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node = mkconst_int(width, true);
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break;
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}
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case AST_STRUCT:
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case AST_UNION: {
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child->delete_children();
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width = size_packed_struct(template_node, 0);
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node = mkconst_int(width, false);
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break;
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}
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default:
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log_error("Don't know how to translate static cast of type %s\n", type2str(template_node->type).c_str());
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}
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}
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delete child;
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children.erase(children.begin());
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children.insert(children.begin(), node);
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}
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detect_width_simple = true;
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children_are_self_determined = true;
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break;
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}
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case AST_TO_BITS:
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case AST_TO_SIGNED:
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case AST_TO_UNSIGNED:
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case AST_SELFSZ:
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case AST_CAST_SIZE:
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case AST_CONCAT:
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case AST_REPLICATE:
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case AST_REDUCE_AND:
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@ -3506,6 +3506,12 @@ basic_expr:
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$$ = new AstNode(AST_CAST_SIZE, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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} |
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typedef_base_type OP_CAST '(' expr ')' {
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if (!sv_mode)
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frontend_verilog_yyerror("Static cast is only supported in SystemVerilog mode.");
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$$ = new AstNode(AST_CAST_SIZE, $1, $4);
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SET_AST_NODE_LOC($$, @1, @4);
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} |
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'(' expr '=' expr ')' {
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ensureAsgnExprAllowed();
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AstNode *node = new AstNode(AST_ASSIGN_EQ, $2, $4);
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