3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-06 22:23:23 +00:00

Added support for blanks after -I and -D in read_verilog

This commit is contained in:
Clifford Wolf 2014-02-02 13:06:21 +01:00
parent f4f0bd6eef
commit cdd6e11af5

View file

@ -195,18 +195,31 @@ struct VerilogFrontend : public Frontend {
flag_ignore_redef = true; flag_ignore_redef = true;
continue; continue;
} }
if (arg.compare(0,2,"-D") == 0) { if (arg == "-D" && argidx+1 < args.size()) {
size_t equal = arg.find('=',2); // returns string::npos it not found std::string name = args[++argidx], value;
std::string name = arg.substr(2,equal-2); size_t equal = name.find('=', 2);
std::string value;
if (equal != std::string::npos) { if (equal != std::string::npos) {
value = arg.substr(equal+1,std::string::npos); value = arg.substr(equal+1);
name = arg.substr(0, equal);
} }
defines_map[name] = value; defines_map[name] = value;
continue; continue;
} }
if (arg.compare(0,2,"-I") == 0) { if (arg.compare(0, 2, "-D") == 0) {
include_dirs.push_back(arg.substr(2,std::string::npos)); size_t equal = arg.find('=', 2);
std::string name = arg.substr(2, equal-2);
std::string value;
if (equal != std::string::npos)
value = arg.substr(equal+1);
defines_map[name] = value;
continue;
}
if (arg == "-I" && argidx+1 < args.size()) {
include_dirs.push_back(args[++argidx]);
continue;
}
if (arg.compare(0, 2, "-I") == 0) {
include_dirs.push_back(arg.substr(2));
continue; continue;
} }
break; break;