mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-03 21:09:12 +00:00
Code Activity

Reject if (* init *) present

Browse source
This commit is contained in:
Eddie Hung 2019-09-25 18:21:08 -07:00
parent 34aa3532fb
commit cd8a640989
2 changed files with 6 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

3
passes/pmgen/ice40_dsp.pmg
View file

@ -333,6 +333,9 @@ code
reject;
if (c.wire->get_bool_attribute(\keep))
reject;
Const init = c.wire->attributes.at(\init, State::Sx);
if (!init.is_fully_undef() && !init.is_fully_zero())
reject;
}
endcode

3
passes/pmgen/xilinx_dsp.pmg
View file

@ -355,6 +355,9 @@ code
reject;
if (c.wire->get_bool_attribute(\keep))
reject;
Const init = c.wire->attributes.at(\init, State::Sx);
if (!init.is_fully_undef() && !init.is_fully_zero())
reject;
}
endcode