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https://github.com/YosysHQ/yosys
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sdc: bit selections
This commit is contained in:
Emil J. Tywoniak
parent
4a347db75a
commit
cd244d0d02
1 changed files with 142 additions and 34 deletions
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@ -18,15 +18,77 @@ struct SdcObjects {
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FullGetter,
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FullConstraint,
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} collect_mode;
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struct BitSelection {
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bool all = false;
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std::vector<bool> bits = {};
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void set_all() {
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bits.clear();
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all = true;
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}
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void clear() {
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bits.clear();
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all = false;
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}
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void set(size_t idx) {
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if (all)
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return;
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if (idx >= bits.size())
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bits.resize(idx + 1);
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bits[idx] = true;
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}
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void merge(const BitSelection& other) {
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if (all)
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return;
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if (other.all) {
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set_all();
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return;
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}
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if (other.bits.size() > bits.size())
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bits.resize(other.bits.size());
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for (size_t other_idx = 0; other_idx < other.bits.size(); other_idx++) {
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bool other_bit = other.bits[other_idx];
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if (other_bit)
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set(other_idx);
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}
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}
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void dump() {
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if (!all) {
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for (size_t i = 0; i < bits.size(); i++)
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if (bits[i])
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log("\t\t [%zu]\n", i);
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} else {
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log("\t\t FULL\n");
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}
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}
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bool is_set(size_t idx) {
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if (all)
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return true;
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if (idx >= bits.size())
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return false;
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return bits[idx];
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}
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// TODO actually use this
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void compress(size_t size) {
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if (bits.size() < size)
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return;
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for (size_t i = 0; i < size; i++)
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if (!bits[i])
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return;
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bits.clear();
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bits.shrink_to_fit();
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all = true;
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}
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};
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using CellPin = std::pair<Cell*, IdString>;
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std::vector<std::string> design_ports;
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std::vector<std::pair<std::string, Cell*>> design_cells;
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std::vector<std::pair<std::string, Cell*>> design_pins;
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std::vector<std::pair<std::string, CellPin>> design_pins;
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std::vector<std::pair<std::string, Wire*>> design_nets;
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pool<std::string> constrained_ports;
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dict<std::string, BitSelection> constrained_ports;
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pool<std::pair<std::string, Cell*>> constrained_cells;
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pool<std::pair<std::string, Cell*>> constrained_pins;
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pool<std::pair<std::string, Wire*>> constrained_nets;
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dict<std::pair<std::string, CellPin>, BitSelection> constrained_pins;
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dict<std::pair<std::string, Wire*>, BitSelection> constrained_nets;
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void sniff_module(std::list<std::string>& hierarchy, Module* mod) {
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std::string prefix;
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@ -62,8 +124,9 @@ struct SdcObjects {
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path += name;
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design_cells.push_back(std::make_pair(path, cell));
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for (auto pin : cell->connections()) {
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std::string pin_name = path + "/" + pin.first.str().substr(1);
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design_pins.push_back(std::make_pair(pin_name, cell));
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IdString pin_name = pin.first;
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std::string pin_name_sdc = path + "/" + pin.first.str().substr(1);
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design_pins.push_back(std::make_pair(pin_name_sdc, std::make_pair(cell, pin_name)));
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}
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if (auto sub_mod = mod->design->module(cell->type)) {
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hierarchy.push_back(name);
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@ -113,23 +176,28 @@ struct SdcObjects {
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// }
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// log("\n");
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log("Constrained ports:\n");
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for (auto name : constrained_ports) {
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for (auto [name, bits] : constrained_ports) {
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log("\t%s\n", name.c_str());
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bits.dump();
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}
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log("Constrained cells:\n");
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for (auto [name, cell] : constrained_cells) {
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for (auto& [name, cell] : constrained_cells) {
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(void)cell;
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log("\t%s\n", name.c_str());
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}
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log("Constrained pins:\n");
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for (auto [name, pin] : constrained_pins) {
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for (auto& [ref, bits] : constrained_pins) {
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auto [name, pin] = ref;
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(void)pin;
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log("\t%s\n", name.c_str());
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bits.dump();
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}
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log("Constrained nets:\n");
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for (auto [name, net] : constrained_nets) {
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for (auto& [ref, bits] : constrained_nets) {
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auto [name, net] = ref;
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(void)net;
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log("\t%s\n", name.c_str());
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bits.dump();
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}
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log("\n");
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}
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@ -163,10 +231,36 @@ struct MatchConfig {
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hier(hierarchical_flag ? FLAT : TREE) { }
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};
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static bool matches(std::string name, const std::string& pat, const MatchConfig& config) {
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static std::pair<bool, SdcObjects::BitSelection> matches(std::string name, const std::string& pat, const MatchConfig& config) {
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(void)config;
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// TODO implement full mode
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return name == pat;
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bool got_bit_index = false;;
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int bit_idx;
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std::string pat_base = pat;
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size_t pos = pat.rfind('[');
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if (pos != std::string::npos) {
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got_bit_index = true;
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pat_base = pat.substr(0, pos);
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std::string bit_selector = pat.substr(pos + 1, pat.rfind(']') - pos - 1);
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for (auto c : bit_selector)
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if (!std::isdigit(c))
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log_error("Unsupported bit selector %s in SDC pattern %s\n",
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bit_selector.c_str(), pat.c_str());
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bit_idx = std::stoi(bit_selector);
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}
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SdcObjects::BitSelection bits = {};
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if (name == pat_base) {
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if (got_bit_index) {
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bits.set(bit_idx);
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return std::make_pair(true, bits);
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} else {
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bits.set_all();
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return std::make_pair(true, bits);
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}
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} else {
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return std::make_pair(false, bits);
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}
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}
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static int sdc_get_pins_cmd(ClientData data, Tcl_Interp *interp, int objc, Tcl_Obj* const objv[])
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@ -177,7 +271,7 @@ static int sdc_get_pins_cmd(ClientData data, Tcl_Interp *interp, int objc, Tcl_O
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bool regexp_flag = false;
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bool nocase_flag = false;
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std::string separator = "/";
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Tcl_Obj* of_objects;
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Tcl_Obj* of_objects = nullptr;
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std::vector<std::string> patterns;
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int i = 1;
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for (; i < objc; i++) {
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@ -209,30 +303,37 @@ static int sdc_get_pins_cmd(ClientData data, Tcl_Interp *interp, int objc, Tcl_O
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}
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MatchConfig config(regexp_flag, nocase_flag, hierarchical_flag);
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std::vector<std::pair<std::string, Cell*>> resolved;
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std::vector<std::tuple<std::string, SdcObjects::CellPin, SdcObjects::BitSelection>> resolved;
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for (auto pat : patterns) {
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bool found = false;
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for (auto [name, pin] : objects->design_pins) {
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if (matches(name, pat, config)) {
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auto [does_match, matching_bits] = matches(name, pat, config);
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if (does_match) {
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found = true;
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resolved.push_back(std::make_pair(name, pin));
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resolved.push_back(std::make_tuple(name, pin, matching_bits));
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}
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}
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if (!found)
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log_warning("No matches in design for pin %s\n", pat.c_str());
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}
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Tcl_Obj *result = Tcl_NewListObj(resolved.size(), nullptr);
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for (auto obj : resolved) {
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Tcl_ListObjAppendElement(interp, result, Tcl_NewStringObj(obj.first.c_str(), obj.first.size()));
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if (objects->collect_mode != SdcObjects::CollectMode::FullConstraint)
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objects->constrained_pins.insert(obj);
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}
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if (separator != "/") {
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Tcl_SetResult(interp, (char *)"Only '/' accepted as separator", TCL_STATIC);
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return TCL_ERROR;
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}
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Tcl_Obj *result = Tcl_NewListObj(resolved.size(), nullptr);
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for (auto [name, pin, matching_bits] : resolved) {
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// TODO change this to graph tracking if desired
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size_t width = (size_t)pin.first->getPort(pin.second).size();
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for (size_t i = 0; i < width; i++)
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if (matching_bits.is_set(i))
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Tcl_ListObjAppendElement(interp, result, Tcl_NewStringObj(name.c_str(), name.size()));
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if (objects->collect_mode != SdcObjects::CollectMode::FullConstraint)
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objects->constrained_pins[std::make_pair(name, pin)].merge(matching_bits);
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}
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Tcl_SetObjResult(interp, result);
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return TCL_OK;
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}
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@ -262,23 +363,29 @@ static int sdc_get_ports_cmd(ClientData data, Tcl_Interp *interp, int objc, Tcl_
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}
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}
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MatchConfig config(regexp_flag, nocase_flag, false);
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std::vector<std::string> resolved;
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std::vector<std::tuple<std::string, SdcObjects::BitSelection>> resolved;
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for (auto pat : patterns) {
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bool found = false;
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for (auto name : objects->design_ports) {
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if (matches(name, pat, config)) {
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auto [does_match, matching_bits] = matches(name, pat, config);
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if (does_match) {
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found = true;
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resolved.push_back(name);
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resolved.push_back(std::make_tuple(name, matching_bits));
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}
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}
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if (!found)
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log_warning("No matches in design for port %s\n", pat.c_str());
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}
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Tcl_Obj *result = Tcl_NewListObj(resolved.size(), nullptr);
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for (auto obj : resolved) {
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for (auto [obj, matching_bits] : resolved) {
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Tcl_ListObjAppendElement(interp, result, Tcl_NewStringObj(obj.c_str(), obj.size()));
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if (objects->collect_mode != SdcObjects::CollectMode::FullConstraint)
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objects->constrained_ports.insert(obj);
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if (objects->collect_mode != SdcObjects::CollectMode::FullConstraint) {
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if (objects->constrained_ports.count(obj) == 0) {
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objects->constrained_ports[obj] = matching_bits;
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} else {
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objects->constrained_ports[obj].merge(matching_bits);
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}
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}
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}
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Tcl_SetObjResult(interp, result);
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@ -332,11 +439,12 @@ static int ys_track_typed_key_cmd(ClientData data, Tcl_Interp *interp, int objc,
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log("PIN! %s\n", str);
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bool found = false;
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for (auto [name, pin] : objects->design_pins) {
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if (name + "/" + pin->name.str() == str) {
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found = true;
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objects->constrained_pins.insert(std::make_pair(name, pin));
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break; // resolved, expected unique
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}
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log_error("TODO temporarily disabled due to working on a different flow\n");
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// if (name + "/" + pin->name.str() == str) {
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// found = true;
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// objects->constrained_pins.insert(std::make_pair(name, pin));
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// break; // resolved, expected unique
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// }
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}
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if (!found)
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log_error("%s: pin %s not found\n", proc_name.c_str(), str);
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