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Added RTLIL::SigSpecConstIterator

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This commit is contained in:
Clifford Wolf 2014-07-27 14:47:23 +02:00
parent dbb3556e3f
commit cbc3a46a97
1 changed files with 18 additions and 0 deletions
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18
kernel/rtlil.h
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@ -70,6 +70,7 @@ namespace RTLIL
struct SigChunk; struct SigChunk;
struct SigBit; struct SigBit;
struct SigSpecIterator; struct SigSpecIterator;
struct SigSpecConstIterator;
struct SigSpec; struct SigSpec;
struct CaseRule; struct CaseRule;
struct SwitchRule; struct SwitchRule;
@ -698,6 +699,16 @@ struct RTLIL::SigSpecIterator
inline void operator++() { index++; } inline void operator++() { index++; }
}; };
struct RTLIL::SigSpecConstIterator
{
const RTLIL::SigSpec *sig_p;
int index;
inline const RTLIL::SigBit &operator*() const;
inline bool operator!=(const RTLIL::SigSpecConstIterator &other) const { return index != other.index; }
inline void operator++() { index++; }
};
struct RTLIL::SigSpec struct RTLIL::SigSpec
{ {
private: private:
@ -762,6 +773,9 @@ public:
inline RTLIL::SigSpecIterator begin() { RTLIL::SigSpecIterator it; it.sig_p = this; it.index = 0; return it; } inline RTLIL::SigSpecIterator begin() { RTLIL::SigSpecIterator it; it.sig_p = this; it.index = 0; return it; }
inline RTLIL::SigSpecIterator end() { RTLIL::SigSpecIterator it; it.sig_p = this; it.index = width_; return it; } inline RTLIL::SigSpecIterator end() { RTLIL::SigSpecIterator it; it.sig_p = this; it.index = width_; return it; }
inline RTLIL::SigSpecConstIterator begin() const { RTLIL::SigSpecConstIterator it; it.sig_p = this; it.index = 0; return it; }
inline RTLIL::SigSpecConstIterator end() const { RTLIL::SigSpecConstIterator it; it.sig_p = this; it.index = width_; return it; }
void sort(); void sort();
void sort_and_unify(); void sort_and_unify();
@ -829,6 +843,10 @@ inline RTLIL::SigBit &RTLIL::SigSpecIterator::operator*() const {
return (*sig_p)[index]; return (*sig_p)[index];
} }
inline const RTLIL::SigBit &RTLIL::SigSpecConstIterator::operator*() const {
return (*sig_p)[index];
}
inline RTLIL::SigBit::SigBit(const RTLIL::SigSpec &sig) { inline RTLIL::SigBit::SigBit(const RTLIL::SigSpec &sig) {
assert(sig.size() == 1 && sig.chunks().size() == 1); assert(sig.size() == 1 && sig.chunks().size() == 1);
*this = SigBit(sig.chunks().front()); *this = SigBit(sig.chunks().front());