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Merge pull request #5387 from jix/misc-log-cleanup

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Various logging fixes and cleanup
This commit is contained in:
Jannis Harder 2025-09-24 17:24:22 +02:00 • committed by GitHub
commit cb8f86b64f
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GPG key ID: B5690EEEBB952194
4 changed files with 14 additions and 7 deletions
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9
kernel/log.cc
View file

@ -331,10 +331,12 @@ static void log_error_with_prefix(std::string_view prefix, std::string str)
if (log_errfile != NULL)
log_files.push_back(log_errfile);
if (log_error_stderr)
if (log_error_stderr) {
log_flush(); // Make sure we flush stdout before replacing it with stderr
for (auto &f : log_files)
if (f == stdout)
f = stderr;
}
log_last_error = std::move(str);
log("%s%s", prefix, log_last_error);
@ -405,6 +407,11 @@ void log_abort_internal(const char *file, int line)
log_error("Abort in %s:%d.\n", file, line);
}
void log_yosys_abort_message(std::string_view file, int line, std::string_view func, std::string_view message)
{
log_error("Abort in %s:%d (%s): %s\n", file, line, func, message);
}
void log_formatted_cmd_error(std::string str)
{
if (log_cmd_error_throw) {

7
kernel/yosys_common.h
View file

@ -142,7 +142,12 @@
#define YOSYS_CONSTEVAL constexpr
#endif
#define YOSYS_ABORT(s) abort()
#define YOSYS_ABORT(s) YOSYS_NAMESPACE_PREFIX log_yosys_abort_message(__FILE__, __LINE__, __FUNCTION__, s)
// This has to precede including "kernel/io.h"
YOSYS_NAMESPACE_BEGIN
[[noreturn]] void log_yosys_abort_message(std::string_view file, int line, std::string_view func, std::string_view message);
YOSYS_NAMESPACE_END
#include "kernel/io.h"

1
passes/techmap/abc9_ops.cc
View file

@ -1600,7 +1600,6 @@ static void replace_zbufs(Design *design)
sig[i] = w;
}
}
log("XXX %s -> %s\n", log_signal(cell->getPort(ID::A)), log_signal(sig));
cell->setPort(ID::A, sig);
}

4
passes/techmap/simplemap.cc
View file

@ -18,7 +18,6 @@
*/
#include "simplemap.h"
#include "backends/rtlil/rtlil_backend.h"
#include "kernel/sigtools.h"
#include "kernel/ff.h"
#include <stdlib.h>
@ -156,14 +155,11 @@ void simplemap_reduce(RTLIL::Module *module, RTLIL::Cell *cell)
}
RTLIL::Cell *gate = module->addCell(NEW_ID, gate_type);
log("huh\n");
RTLIL_BACKEND::dump_cell(std::cout, "", cell);
transfer_src(gate, cell);
gate->setPort(ID::A, sig_a[i]);
gate->setPort(ID::B, sig_a[i+1]);
gate->setPort(ID::Y, sig_t[i/2]);
last_output_cell = gate;
RTLIL_BACKEND::dump_cell(std::cout, "", gate);
}
sig_a = sig_t;