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synth_gatemate Revert cascade A/B port mixup

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Patrick Urban 2021-11-12 08:47:15 +01:00 • committed by Marcelina Kościelnicka
parent decdc743db
commit cb41209095
2 changed files with 4 additions and 12 deletions
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8
techlibs/gatemate/cells_sim.v
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@ -1035,14 +1035,6 @@ module CC_BRAM_40K (
$display("ERROR: Port B width of 80 bits is only supported in SDP mode.");
$finish();
end
if (((CAS == "UPPER") || (CAS == "LOWER")) && (WIDTH_MODE_A > 1)) begin
$display("ERROR: Port A cascade mode only supported in 1 bit mode.");
$finish();
end
if (((CAS == "UPPER") || (CAS == "LOWER")) && (WIDTH_MODE_B > 1)) begin
$display("ERROR: Port B cascade mode only supported in 1 bit mode.");
$finish();
end
if ((WIDTH_MODE_A != 80) && (WIDTH_MODE_A != 40) && (WIDTH_MODE_A != 20) && (WIDTH_MODE_A != 10) &&
(WIDTH_MODE_A != 5) && (WIDTH_MODE_A != 2) && (WIDTH_MODE_A != 1) && (WIDTH_MODE_A != 0)) begin
$display("ERROR: Illegal %s Port A width configuration %d.", RAM_MODE, WIDTH_MODE_A);